RT info:eu-repo/semantics/conferenceObject
T1 Low-energy inference machine with multilevel HfO2 RRAM arrays
A1 Milo, V.
A1 Zambelli, Cristian
A1 Olivo, P.
A1 Pérez, Eduardo
A1 González Ossorio, Óscar
A1 Wenger, Christian
A1 Ielmini, Daniele
K1 Resistive RAM memory (RRAM)
K1 Memoria RAM resistiva (RRAM)
K1 Machine learning
K1 Aprendizaje automatizado
K1 Neural network
K1 Red neuronal
K1 1203.04 Inteligencia Artificial
AB Recently, artificial intelligence reached impressive milestones in many machine learning tasks such as the recognition of faces, objects, and speech. These achievements have been mostly demonstrated in software running on high-performance computers, such as the graphics processing unit (GPU) or the tensor processing unit (TPU). Novel hardware with in-memory processing is however more promising in view of the reduced latency and the improved energy efficiency. In this scenario, emerging memory technologies such as phase change memory (PCM) and resistive switching memory (RRAM), have been proposed for hardware accelerators of both learning and inference tasks. In this work, a multilevel 4kbit RRAM array is used to implement a 2-layer feedforward neural network trained with the MNIST dataset. The performance of the network in the inference mode is compared with recently proposed implementations using the same image dataset demonstrating the higher energy efficiency of our hardware, thanks to low current operation and an innovative multilevel programming scheme. These results support RRAM technology for in-memory hardware accelerators of machine learning.
PB IEEE Xplore
SN 978-1-7281-1539-9
YR 2019
FD 2019
LK http://uvadoc.uva.es/handle/10324/45430
UL http://uvadoc.uva.es/handle/10324/45430
LA eng
NO 49th European Solid-State Device Research Conference (ESSDERC 2019). Cracovia, Polonia: IEEE Xplore, 2019, p. 174-177
NO Producción Científica
DS UVaDOC
RD 29-may-2024