Lattice Mapping Report File for Design Module 'esquema_global'



Design Information

Command line:   map -a MachXO2 -p LCMXO2-1200ZE -t TQFP144 -s 1 -oc Commercial
     proyecto_global_proyecto_global.ngd -o
     proyecto_global_proyecto_global_map.ncd -pr
     proyecto_global_proyecto_global.prf -mp proyecto_global_proyecto_global.mrp
     -lpf
     C:/TFG/exp6/proyecto_global/proyecto_global_proyecto_global_synplify.lpf
     -lpf C:/TFG/exp6/proyecto_global.lpf -c 0 -gui -msgset
     C:/TFG/exp6/promote.xml 
Target Vendor:  LATTICE
Target Device:  LCMXO2-1200ZETQFP144
Target Performance:   1
Mapper:  xo2c00,  version:  Diamond Version 3.8.0.115.3
Mapped on:  09/16/17  03:40:09


Design Summary
   Number of registers:    206 out of  1604 (13%)
      PFU registers:          202 out of  1280 (16%)
      PIO registers:            4 out of   324 (1%)
   Number of SLICEs:       296 out of   640 (46%)
      SLICEs as Logic/ROM:    260 out of   640 (41%)
      SLICEs as RAM:           36 out of   480 (8%)
      SLICEs as Carry:         53 out of   640 (8%)
   Number of LUT4s:        587 out of  1280 (46%)
      Number used as logic LUTs:        409
      Number used as distributed RAM:    72
      Number used as ripple logic:      106
      Number used as shift registers:     0
   Number of PIO sites used: 30 + 4(JTAG) out of 108 (31%)
   Number of block RAMs:  6 out of 7 (86%)
   Number of GSRs:  1 out of 1 (100%)
   EFB used :       No
   JTAG used :      No
   Readback used :  No
   Oscillator used :  Yes
   Startup used :   No
   POR :            On
   Bandgap :        On
   Number of Power Controller:  0 out of 1 (0%)
   Number of Dynamic Bank Controller (BCINRD):  0 out of 4 (0%)
   Number of Dynamic Bank Controller (BCLVDSO):  0 out of 1 (0%)
   Number of DCCA:  0 out of 8 (0%)
   Number of DCMA:  0 out of 2 (0%)
   Number of PLLs:  1 out of 1 (100%)
   Number of DQSDLLs:  0 out of 2 (0%)
   Number of CLKDIVC:  0 out of 4 (0%)
   Number of ECLKSYNCA:  0 out of 4 (0%)
   Number of ECLKBRIDGECS:  0 out of 2 (0%)
   Notes:-
      1. Total number of LUT4s = (Number of logic LUT4s) + 2*(Number of
     distributed RAMs) + 2*(Number of ripple logic)
      2. Number of logic LUT4s does not include count of distributed RAM and
     ripple logic.
   Number of clocks:  6

     Net N_45: 11 loads, 11 rising, 0 falling (Driver: I5 )
     Net N_27: 6 loads, 6 rising, 0 falling (Driver: I53/PLLInst_0 )
     Net Q[20]: 6 loads, 6 rising, 0 falling (Driver: I7/FF_0 )
     Net N_43: 118 loads, 118 rising, 0 falling (Driver: I84/FF_0 )
     Net clk_ext_sal_c: 6 loads, 6 rising, 0 falling (Driver: PIO clk_ext_sal )
     Net N_44: 13 loads, 13 rising, 0 falling (Driver: I51 )
   Number of Clock Enables:  16
     Net I82.lm8_inst.gpiocont.PIO_DATA_RE_EN: 4 loads, 0 LSLICEs
     Net I82/lm8_inst/gpiosal/PIO_DATA109: 2 loads, 2 LSLICEs
     Net I82/lm8_inst/gpiosal/PIO_DATA19: 4 loads, 4 LSLICEs
     Net I82/lm8_inst/gpioent/PIO_DATA_RE_EN: 6 loads, 6 LSLICEs
     Net I82/lm8_inst/LM8D_ACK_I: 4 loads, 4 LSLICEs
     Net I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_interrupt/im_nxt4: 4 loads, 4
     LSLICEs
     Net I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_interrupt/un1_ie_nxt5: 1 loads, 1
     LSLICEs
     Net I82/lm8_inst/LM8/u1_isp8_core/addr_cyc: 7 loads, 7 LSLICEs
     Net I82/lm8_inst/LM8/data_cyc: 6 loads, 6 LSLICEs
     Net I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_flow_cntl/un8_zero_flag_nxt_i: 1
     loads, 1 LSLICEs
     Net I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_flow_cntl/un8_carry_flag_nxt_i: 1
     loads, 1 LSLICEs
     Net I82/lm8_inst/LM8/prom_enable: 9 loads, 1 LSLICEs
     Net I82/lm8_inst/LM8/u1_isp8_core/page_ptr16: 5 loads, 5 LSLICEs
     Net N_36: 2 loads, 2 LSLICEs
     Net cont_BCD_3dig_c: 2 loads, 2 LSLICEs
     Net N_14: 2 loads, 2 LSLICEs
   Number of local set/reset loads for net I82/lm8_inst/LM8/rst_n merged into
     GSR:  83
   Number of LSRs:  6
     Net N_49: 11 loads, 11 LSLICEs
     Net Q[20]: 13 loads, 13 LSLICEs
     Net I82/lm8_inst/LM8/rst_n: 7 loads, 7 LSLICEs
     Net I82/lm8_inst/counter[2]: 22 loads, 18 LSLICEs
     Net s2: 6 loads, 6 LSLICEs
     Net N_41: 2 loads, 2 LSLICEs
   Number of nets driven by tri-state buffers:  0
   Top 10 highest fanout non-clock nets:
     Net I82/lm8_inst/LM8/first_fetch: 65 loads
     Net I82/lm8_inst/LM8/genblk1.u1_isp8_prom/addr10_ff: 34 loads
     Net I82/lm8_inst/LM8/instr[10]: 26 loads
     Net I82/lm8_inst/LM8/instr[8]: 26 loads
     Net I82/lm8_inst/counter[2]: 25 loads
     Net I82/lm8_inst/LM8/instr[11]: 25 loads
     Net I82/lm8_inst/LM8/instr[9]: 25 loads
     Net I82/lm8_inst/LM8/instr_mem_out[15]: 24 loads
     Net I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_flow_cntl/ret_reg: 22 loads
     Net I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_flow_cntl/rst_exception: 22 loads




   Number of warnings:  7
   Number of errors:    0
     





Design Errors/Warnings

WARNING - map: Using local reset signal 'I82/lm8_inst/LM8/rst_n' to infer global
     GSR net.
WARNING - map: The reset of EBR 'I82/lm8_inst/LM8/genblk1.u1_isp8_prom/pmi_ram_d
     qEnhprom_initsadn18112048p12a15e99_1_1_0' cannot be controlled. The local
     reset is not connected to any control signal and set to GND. The global
     reset is disabled via GSR property. To control the EBR reset, either
     connect the local reset to a control signal or force the GSR property to be
     enabled.
WARNING - map: The reset of EBR 'I82/lm8_inst/LM8/genblk1.u1_isp8_prom/pmi_ram_d
     qEnhprom_initsadn18112048p12a15e99_0_0_3' cannot be controlled. The local
     reset is not connected to any control signal and set to GND. The global
     reset is disabled via GSR property. To control the EBR reset, either
     connect the local reset to a control signal or force the GSR property to be
     enabled.
WARNING - map: The reset of EBR 'I82/lm8_inst/LM8/genblk1.u1_isp8_prom/pmi_ram_d
     qEnhprom_initsadn18112048p12a15e99_0_1_2' cannot be controlled. The local
     reset is not connected to any control signal and set to GND. The global
     reset is disabled via GSR property. To control the EBR reset, either
     connect the local reset to a control signal or force the GSR property to be
     enabled.
WARNING - map: The reset of EBR 'I82/lm8_inst/LM8/genblk1.u1_isp8_prom/pmi_ram_d
     qEnhprom_initsadn18112048p12a15e99_1_0_1' cannot be controlled. The local
     reset is not connected to any control signal and set to GND. The global
     reset is disabled via GSR property. To control the EBR reset, either
     connect the local reset to a control signal or force the GSR property to be
     enabled.
WARNING - map: The reset of EBR 'I82/lm8_inst/LM8/genblk3.u1_scratchpad/pmi_ram_
     dqEnhscratchpad_initsadn8112048p12ef1db0_0_1_0' cannot be controlled. The
     local reset is not connected to any control signal and set to GND. The
     global reset is disabled via GSR property. To control the EBR reset, either
     connect the local reset to a control signal or force the GSR property to be
     enabled.
WARNING - map: The reset of EBR 'I82/lm8_inst/LM8/genblk3.u1_scratchpad/pmi_ram_
     dqEnhscratchpad_initsadn8112048p12ef1db0_0_0_1' cannot be controlled. The
     local reset is not connected to any control signal and set to GND. The
     global reset is disabled via GSR property. To control the EBR reset, either
     connect the local reset to a control signal or force the GSR property to be
     enabled.



IO (PIO) Attributes

+---------------------+-----------+-----------+------------+
| IO Name             | Direction | Levelmode | IO         |
|                     |           |  IO_TYPE  | Register   |
+---------------------+-----------+-----------+------------+
| sal1hz              | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| aclr_a1hz           | INPUT     | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| Rx                  | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| cont_BCD_3dig       | INPUT     | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| clk_ext_sal         | INPUT     | LVCMOS33  |            |

+---------------------+-----------+-----------+------------+
| clk_ext_en          | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| s_led3              | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| s_led2              | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| s_led1              | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| s_led0              | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| seg_g               | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| seg_a               | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| seg_d               | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| seg_c               | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| seg_b               | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| seg_f               | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| seg_e               | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| dseg_a              | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| dseg_b              | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| dseg_c              | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| dseg_d              | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| dseg_e              | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| dseg_f              | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| dseg_g              | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| en_cmc0             | INPUT     | LVCMOS33  | IN         |
+---------------------+-----------+-----------+------------+
| en_cmc1             | INPUT     | LVCMOS33  | IN         |
+---------------------+-----------+-----------+------------+
| en_cmc2             | INPUT     | LVCMOS33  | IN         |
+---------------------+-----------+-----------+------------+
| en_cmc3             | INPUT     | LVCMOS33  | IN         |
+---------------------+-----------+-----------+------------+
| res_miccont         | INPUT     | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| in_osch             | INPUT     | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+



Removed logic

Block GND undriven or does not drive anything - clipped.

Block I82/lm8_inst/GND undriven or does not drive anything - clipped.
Block I82/lm8_inst/VCC undriven or does not drive anything - clipped.
Block I82/lm8_inst/arbiter/GND undriven or does not drive anything - clipped.
Block I82/lm8_inst/arbiter/VCC undriven or does not drive anything - clipped.
Block I82/lm8_inst/LM8/u1_isp8_core/GND undriven or does not drive anything -
     clipped.
Block I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_idec/GND undriven or does not drive
     anything - clipped.
Block I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_alu/GND undriven or does not drive
     anything - clipped.
Block I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_alu/u1_addsub8/scuba_vhi_inst
     undriven or does not drive anything - clipped.
Block I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_alu/u1_addsub8/addsubd undriven or
     does not drive anything - clipped.
Block I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_flow_cntl/genblk3.u1_lm8_stkmem/mem_0
     _0/RAM1 undriven or does not drive anything - clipped.
Block I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_cntl_u1/GND undriven or does not
     drive anything - clipped.
Block I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_cntl_u1/VCC undriven or does not
     drive anything - clipped.
Block I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_interrupt/GND undriven or does not
     drive anything - clipped.
Block I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_interrupt/VCC undriven or does not
     drive anything - clipped.
Block I82/lm8_inst/gpioent/VCC undriven or does not drive anything - clipped.
Block I82/lm8_inst/gpioent/GND undriven or does not drive anything - clipped.
Block I82/lm8_inst/gpiosal/GND undriven or does not drive anything - clipped.
Block I82/lm8_inst/gpiosal/VCC undriven or does not drive anything - clipped.
Block I82/lm8_inst/gpiocont/GND undriven or does not drive anything - clipped.
Block I82/lm8_inst/gpiocont/VCC undriven or does not drive anything - clipped.
Signal N_8 was merged into signal SL[1]
Signal N_15 was merged into signal ST[1]
Signal N_16 was merged into signal ST[2]
Signal N_41_i was merged into signal N_41
Signal N_9 was merged into signal SL[2]
Signal I7/func_and_inet_5 was merged into signal Q[20]
Signal I82.lm8_inst.counter_i[2] was merged into signal I82/lm8_inst/counter[2]
Signal I82/lm8_inst/LM8/rst_n_i was merged into signal I82/lm8_inst/LM8/rst_n
Signal I82/lm8_inst/LM8/genblk1.u1_isp8_prom/wren_inv_g was merged into signal
     I82/lm8_inst/LM8/prom_enable
Signal I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_alu/u1_addsub8/add_sub_inv was
     merged into signal I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_alu/add_sel_i
Signal I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_flow_cntl/genblk3.u1_lm8_stkmem/dec0
     _wre3 was merged into signal
     I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_flow_cntl/stack_ptr_nxt9
Signal I7/GND undriven or does not drive anything - clipped.
Signal I7/VCC undriven or does not drive anything - clipped.
Signal I8/VCC undriven or does not drive anything - clipped.
Signal I8/GND undriven or does not drive anything - clipped.
Signal I43/VCC undriven or does not drive anything - clipped.
Signal I43/GND undriven or does not drive anything - clipped.
Signal I27/VCC undriven or does not drive anything - clipped.
Signal I27/GND undriven or does not drive anything - clipped.
Signal I53/GND undriven or does not drive anything - clipped.
Signal I52/GND undriven or does not drive anything - clipped.
Signal I52/VCC undriven or does not drive anything - clipped.

Signal I69/GND undriven or does not drive anything - clipped.
Signal I82/lm8_inst/LM8/VCC undriven or does not drive anything - clipped.
Signal I82/lm8_inst/LM8/GND undriven or does not drive anything - clipped.
Signal I82/lm8_inst/LM8/genblk1.u1_isp8_prom/wren_inv undriven or does not drive
     anything - clipped.
Signal I82/lm8_inst/LM8/genblk3.u1_scratchpad/scuba_vlo undriven or does not
     drive anything - clipped.
Signal I82/lm8_inst/LM8/genblk3.u1_scratchpad/scuba_vhi undriven or does not
     drive anything - clipped.
Signal I82/lm8_inst/LM8/genblk1.u1_isp8_prom/scuba_vlo undriven or does not
     drive anything - clipped.
Signal I82/lm8_inst/LM8/genblk1.u1_isp8_prom/scuba_vhi undriven or does not
     drive anything - clipped.
Signal I82/lm8_inst/LM8/u1_isp8_core/VCC undriven or does not drive anything -
     clipped.
Signal I82/lm8_inst/LM8/u1_isp8_core/genblk6.genblk1.u2_lm8_rfmem/scuba_vhi
     undriven or does not drive anything - clipped.
Signal I82/lm8_inst/LM8/u1_isp8_core/genblk6.genblk1.u1_lm8_rfmem/scuba_vhi
     undriven or does not drive anything - clipped.
Signal I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_alu/u1_addsub8/scuba_vlo undriven or
     does not drive anything - clipped.
Signal I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_flow_cntl/GND undriven or does not
     drive anything - clipped.
Signal I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_flow_cntl/VCC undriven or does not
     drive anything - clipped.
Signal I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_flow_cntl/genblk3.u1_lm8_stkmem/scub
     a_vhi undriven or does not drive anything - clipped.
Signal I84/GND undriven or does not drive anything - clipped.
Signal I84/VCC undriven or does not drive anything - clipped.
Signal I7/cnt_cia_S1 undriven or does not drive anything - clipped.
Signal I7/cnt_cia_S0 undriven or does not drive anything - clipped.
Signal I7/cnt_10_NC1 undriven or does not drive anything - clipped.
Signal I7/co10 undriven or does not drive anything - clipped.
Signal I8/co1 undriven or does not drive anything - clipped.
Signal I8/cnt_cia_S1_0 undriven or does not drive anything - clipped.
Signal I8/cnt_cia_S0_0 undriven or does not drive anything - clipped.
Signal I43/co1 undriven or does not drive anything - clipped.
Signal I43/cnt_cia_S1_1 undriven or does not drive anything - clipped.
Signal I43/cnt_cia_S0_1 undriven or does not drive anything - clipped.
Signal I27/co1 undriven or does not drive anything - clipped.
Signal I27/cnt_cia_S1_2 undriven or does not drive anything - clipped.
Signal I27/cnt_cia_S0_2 undriven or does not drive anything - clipped.
Signal I53/PLLDATO0 undriven or does not drive anything - clipped.
Signal I53/PLLDATO1 undriven or does not drive anything - clipped.
Signal I53/PLLDATO2 undriven or does not drive anything - clipped.
Signal I53/PLLDATO3 undriven or does not drive anything - clipped.
Signal I53/PLLDATO4 undriven or does not drive anything - clipped.
Signal I53/PLLDATO5 undriven or does not drive anything - clipped.
Signal I53/PLLDATO6 undriven or does not drive anything - clipped.
Signal I53/PLLDATO7 undriven or does not drive anything - clipped.
Signal I53/PLLACK undriven or does not drive anything - clipped.
Signal I53/DPHSRC undriven or does not drive anything - clipped.
Signal I53/CLKINTFB undriven or does not drive anything - clipped.
Signal I53/REFCLK undriven or does not drive anything - clipped.
Signal I53/INTLOCK undriven or does not drive anything - clipped.
Signal I53/LOCK undriven or does not drive anything - clipped.

Signal I53/CLKOS2 undriven or does not drive anything - clipped.
Signal I53/CLKOS undriven or does not drive anything - clipped.
Signal I52/co2 undriven or does not drive anything - clipped.
Signal I52/cnt_cia_S1_3 undriven or does not drive anything - clipped.
Signal I52/cnt_cia_S0_3 undriven or does not drive anything - clipped.
Signal I69/un2_cnt_1_cry_19_0_COUT undriven or does not drive anything -
     clipped.
Signal I69/un2_cnt_1_cry_0_0_S1 undriven or does not drive anything - clipped.
Signal I69/un2_cnt_1_cry_0_0_S0 undriven or does not drive anything - clipped.
Signal I69/N_1 undriven or does not drive anything - clipped.
Signal I82/lm8_inst/LM8/u1_isp8_core/GND undriven or does not drive anything -
     clipped.
Signal I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_alu/u1_addsub8/scuba_vhi undriven or
     does not drive anything - clipped.
Signal I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_alu/u1_addsub8/addsub_0/S0 undriven
     or does not drive anything - clipped.
Signal I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_alu/u1_addsub8/precin_inst30/S1
     undriven or does not drive anything - clipped.
Signal I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_alu/u1_addsub8/precin_inst30/S0
     undriven or does not drive anything - clipped.
Signal I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_alu/u1_addsub8/addsubd/S1 undriven
     or does not drive anything - clipped.
Signal I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_alu/u1_addsub8/co4d undriven or does
     not drive anything - clipped.
Signal I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_alu/u1_addsub8/addsubd/COUT undriven
     or does not drive anything - clipped.
Signal I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_alu/u1_addsub8/co4 undriven or does
     not drive anything - clipped.
Signal I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_flow_cntl/un1_stack_ptr_cry_0_0_S1
     undriven or does not drive anything - clipped.
Signal I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_flow_cntl/un1_stack_ptr_cry_0_0_S0
     undriven or does not drive anything - clipped.
Signal I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_flow_cntl/N_2 undriven or does not
     drive anything - clipped.
Signal I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_flow_cntl/un1_stack_ptr_s_3_0_S1
     undriven or does not drive anything - clipped.
Signal I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_flow_cntl/un1_stack_ptr_s_3_0_COUT
     undriven or does not drive anything - clipped.
Signal I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_flow_cntl/potential_address_cry_0_0_
     S1 undriven or does not drive anything - clipped.
Signal I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_flow_cntl/potential_address_cry_0_0_
     S0 undriven or does not drive anything - clipped.
Signal I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_flow_cntl/N_3 undriven or does not
     drive anything - clipped.
Signal I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_flow_cntl/potential_address_cry_9_0_
     COUT undriven or does not drive anything - clipped.
Signal I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_flow_cntl/genblk3.u1_lm8_stkmem/mem_
     0_0/DO2 undriven or does not drive anything - clipped.
Signal I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_flow_cntl/genblk3.u1_lm8_stkmem/mem_
     0_0/DO3 undriven or does not drive anything - clipped.
Signal I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_flow_cntl/genblk3.u1_lm8_stkmem/mem_
     0_0/DO1 undriven or does not drive anything - clipped.
Signal I84/cnt_0_NC1 undriven or does not drive anything - clipped.
Signal I84/co0 undriven or does not drive anything - clipped.
Signal I84/cnt_cia_S1_4 undriven or does not drive anything - clipped.
Signal I84/cnt_cia_S0_4 undriven or does not drive anything - clipped.

Signal I5_SEDSTDBY undriven or does not drive anything - clipped.
Block I24 was optimized away.
Block I41 was optimized away.
Block I40 was optimized away.
Block I89_RNIQFF2 was optimized away.
Block I25 was optimized away.
Block I7/LUT4_2 was optimized away.
Block I82/lm8_inst/counter_RNI776D[2] was optimized away.
Block I82/lm8_inst/LM8/rst_n_RNI2D9A was optimized away.
Block I82/lm8_inst/LM8/genblk1.u1_isp8_prom/AND2_t0 was optimized away.
Block I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_alu/u1_addsub8/INV_0 was optimized
     away.
Block I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_flow_cntl/genblk3.u1_lm8_stkmem/LUT4_
     0 was optimized away.
Block I7/GND was optimized away.
Block I7/VCC was optimized away.
Block I8/VCC was optimized away.
Block I8/GND was optimized away.
Block I43/VCC was optimized away.
Block I43/GND was optimized away.
Block I27/VCC was optimized away.
Block I27/GND was optimized away.
Block I53/GND was optimized away.
Block I52/GND was optimized away.
Block I52/VCC was optimized away.
Block I69/GND was optimized away.
Block I82/lm8_inst/LM8/VCC was optimized away.
Block I82/lm8_inst/LM8/GND was optimized away.
Block I82/lm8_inst/LM8/genblk1.u1_isp8_prom/INV_0 was optimized away.
Block I82/lm8_inst/LM8/genblk3.u1_scratchpad/scuba_vlo_inst was optimized away.
Block I82/lm8_inst/LM8/genblk3.u1_scratchpad/scuba_vhi_inst was optimized away.
Block I82/lm8_inst/LM8/genblk1.u1_isp8_prom/scuba_vlo_inst was optimized away.
Block I82/lm8_inst/LM8/genblk1.u1_isp8_prom/scuba_vhi_inst was optimized away.
Block I82/lm8_inst/LM8/u1_isp8_core/VCC was optimized away.
Block I82/lm8_inst/LM8/u1_isp8_core/genblk6.genblk1.u2_lm8_rfmem/scuba_vhi_inst
     was optimized away.
Block I82/lm8_inst/LM8/u1_isp8_core/genblk6.genblk1.u1_lm8_rfmem/scuba_vhi_inst
     was optimized away.
Block I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_alu/u1_addsub8/scuba_vlo_inst was
     optimized away.
Block I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_flow_cntl/GND was optimized away.
Block I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_flow_cntl/VCC was optimized away.
Block I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_flow_cntl/genblk3.u1_lm8_stkmem/scuba
     _vhi_inst was optimized away.
Block I84/GND was optimized away.
Block I84/VCC was optimized away.



Memory Usage

/I82/lm8_inst/LM8/genblk1.u1_isp8_prom:
    EBRs: 4
    RAM SLICEs: 0
    Logic SLICEs: 3
    PFU Registers: 0
    -Contains EBR pmi_ram_dqEnhprom_initsadn18112048p12a15e99_1_1_0:  TYPE=

         DP8KC,  Width_A= 9,  Depth_A= 1024,  REGMODE_A= NOREG,  REGMODE_B=
         NOREG,  RESETMODE= ASYNC,  ASYNC_RESET_RELEASE= SYNC,  WRITEMODE_A=
         NORMAL,  WRITEMODE_B= NORMAL,  GSR= DISABLED,  MEM_INIT_FILE=
         prom_init.mem,  MEM_LPC_FILE=
         pmi_ram_dqEnhprom_initsadn18112048p12a15e99__PMIS__2048__18__18H
    -Contains EBR pmi_ram_dqEnhprom_initsadn18112048p12a15e99_0_0_3:  TYPE=
         DP8KC,  Width_A= 9,  Depth_A= 1024,  REGMODE_A= NOREG,  REGMODE_B=
         NOREG,  RESETMODE= ASYNC,  ASYNC_RESET_RELEASE= SYNC,  WRITEMODE_A=
         NORMAL,  WRITEMODE_B= NORMAL,  GSR= DISABLED,  MEM_INIT_FILE=
         prom_init.mem,  MEM_LPC_FILE=
         pmi_ram_dqEnhprom_initsadn18112048p12a15e99__PMIS__2048__18__18H
    -Contains EBR pmi_ram_dqEnhprom_initsadn18112048p12a15e99_0_1_2:  TYPE=
         DP8KC,  Width_A= 9,  Depth_A= 1024,  REGMODE_A= NOREG,  REGMODE_B=
         NOREG,  RESETMODE= ASYNC,  ASYNC_RESET_RELEASE= SYNC,  WRITEMODE_A=
         NORMAL,  WRITEMODE_B= NORMAL,  GSR= DISABLED,  MEM_INIT_FILE=
         prom_init.mem,  MEM_LPC_FILE=
         pmi_ram_dqEnhprom_initsadn18112048p12a15e99__PMIS__2048__18__18H
    -Contains EBR pmi_ram_dqEnhprom_initsadn18112048p12a15e99_1_0_1:  TYPE=
         DP8KC,  Width_A= 9,  Depth_A= 1024,  REGMODE_A= NOREG,  REGMODE_B=
         NOREG,  RESETMODE= ASYNC,  ASYNC_RESET_RELEASE= SYNC,  WRITEMODE_A=
         NORMAL,  WRITEMODE_B= NORMAL,  GSR= DISABLED,  MEM_INIT_FILE=
         prom_init.mem,  MEM_LPC_FILE=
         pmi_ram_dqEnhprom_initsadn18112048p12a15e99__PMIS__2048__18__18H
/I82/lm8_inst/LM8/genblk3.u1_scratchpad:
    EBRs: 2
    RAM SLICEs: 0
    Logic SLICEs: 0
    PFU Registers: 0
    -Contains EBR pmi_ram_dqEnhscratchpad_initsadn8112048p12ef1db0_0_1_0:  TYPE=
         DP8KC,  Width_A= 4,  Depth_A= 2048,  REGMODE_A= NOREG,  REGMODE_B=
         NOREG,  RESETMODE= ASYNC,  ASYNC_RESET_RELEASE= SYNC,  WRITEMODE_A=
         NORMAL,  WRITEMODE_B= NORMAL,  GSR= DISABLED,  MEM_INIT_FILE=
         scratchpad_init.mem,  MEM_LPC_FILE=
         pmi_ram_dqEnhscratchpad_initsadn8112048p12ef1db0__PMIS__2048__8__8H
    -Contains EBR pmi_ram_dqEnhscratchpad_initsadn8112048p12ef1db0_0_0_1:  TYPE=
         DP8KC,  Width_A= 4,  Depth_A= 2048,  REGMODE_A= NOREG,  REGMODE_B=
         NOREG,  RESETMODE= ASYNC,  ASYNC_RESET_RELEASE= SYNC,  WRITEMODE_A=
         NORMAL,  WRITEMODE_B= NORMAL,  GSR= DISABLED,  MEM_INIT_FILE=
         scratchpad_init.mem,  MEM_LPC_FILE=
         pmi_ram_dqEnhscratchpad_initsadn8112048p12ef1db0__PMIS__2048__8__8H
/I82/lm8_inst/LM8/u1_isp8_core/genblk6.genblk1.u1_lm8_rfmem:
    EBRs: 0
    RAM SLICEs: 12
    Logic SLICEs: 0
    PFU Registers: 0
/I82/lm8_inst/LM8/u1_isp8_core/genblk6.genblk1.u2_lm8_rfmem:
    EBRs: 0
    RAM SLICEs: 12
    Logic SLICEs: 0
    PFU Registers: 0
/I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_flow_cntl/genblk3.u1_lm8_stkmem:
    EBRs: 0
    RAM SLICEs: 11
    Logic SLICEs: 0
    PFU Registers: 0
/I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_flow_cntl/genblk3.u1_lm8_stkmem/mem_0_0/RA

     MW:
    EBRs: 0
    RAM SLICEs: 1
    Logic SLICEs: 0
    PFU Registers: 0

     



PLL/DLL Summary
---------------

PLL 1:                                     Pin/Node Value
  PLL Instance Name:                                I53/PLLInst_0
  PLL Type:                                         EHXPLLJ
  Input Clock:                             PIN      clk_ext_sal_c
  Output Clock(P):                         NODE     I53/CLKOP
  Output Clock(S):                                  NONE
  Output Clock(S2):                                 NONE
  Output Clock(S3):                        PIN,NODE N_27
  Feedback Signal:                         NODE     I53/CLKOP
  Reset Signal:                                     NONE
  M Divider Reset Signal:                           NONE
  C Divider Reset Signal:                           NONE
  D Divider Reset Signal:                           NONE
  Standby Signal:                                   NONE
  PLL LOCK signal:                                  NONE
  PLL Data bus CLK Signal:                          NONE
  PLL Data bus Strobe Signal:                       NONE
  PLL Data bus Reset Signal:                        NONE
  PLL Data bus Write Enable Signal:                 NONE
  PLL Data bus Address0:                            NONE
  PLL Data bus Address1:                            NONE
  PLL Data bus Address2:                            NONE
  PLL Data bus Address3:                            NONE
  PLL Data bus Address4:                            NONE
  PLL Data In bus Data0:                            NONE
  PLL Data In bus Data1:                            NONE
  PLL Data In bus Data2:                            NONE
  PLL Data In bus Data3:                            NONE
  PLL Data In bus Data4:                            NONE
  PLL Data In bus Data5:                            NONE
  PLL Data In bus Data6:                            NONE
  PLL Data In bus Data7:                            NONE
  PLL Data bus Acknowledge:                         NONE
  PLL Data Out bus Data0:                           NONE
  PLL Data Out bus Data1:                           NONE
  PLL Data Out bus Data2:                           NONE
  PLL Data Out bus Data3:                           NONE
  PLL Data Out bus Data4:                           NONE
  PLL Data Out bus Data5:                           NONE
  PLL Data Out bus Data6:                           NONE
  PLL Data Out bus Data7:                           NONE
  Input Clock Frequency (MHz):                      50.0000
  Output Clock(P) Frequency (MHz):                  10.0000
  Output Clock(S) Frequency (MHz):                  NA
  Output Clock(S2) Frequency (MHz):                 NA

  Output Clock(S3) Frequency (MHz):                  0.0173
  CLKOP Post Divider A Input:                       DIVA
  CLKOS Post Divider B Input:                       DIVB
  CLKOS2 Post Divider C Input:                      DIVC
  CLKOS3 Post Divider D Input:                      DIVD
  Pre Divider A Input:                              VCO_PHASE
  Pre Divider B Input:                              VCO_PHASE
  Pre Divider C Input:                              VCO_PHASE
  Pre Divider D Input:                              DIVC
  VCO Bypass A Input:                               VCO_PHASE
  VCO Bypass B Input:                               VCO_PHASE
  VCO Bypass C Input:                               VCO_PHASE
  VCO Bypass D Input:                               VCO_PHASE
  FB_MODE:                                          CLKOP
  CLKI Divider:                                     5
  CLKFB Divider:                                    1
  CLKOP Divider:                                    27
  CLKOS Divider:                                    1
  CLKOS2 Divider:                                   122
  CLKOS3 Divider:                                   128
  Fractional N Divider:                             0
  CLKOP Desired Phase Shift(degree):                0
  CLKOP Trim Option Rising/Falling:                 RISING
  CLKOP Trim Option Delay:                          0
  CLKOS Desired Phase Shift(degree):                0
  CLKOS Trim Option Rising/Falling:                 FALLING
  CLKOS Trim Option Delay:                          0
  CLKOS2 Desired Phase Shift(degree):               0
  CLKOS3 Desired Phase Shift(degree):               0

OSC Summary
-----------

OSC 1:                                     Pin/Node Value
  OSC Instance Name:                                I5
  OSC Type:                                         OSCH
  STDBY Input:                             PIN      N_46
  OSC Output:                              NODE     N_45
  OSC Nominal Frequency (MHz):                      2.08



ASIC Components
---------------

Instance Name: I5
         Type: OSCH
Instance Name: I82/lm8_inst/LM8/genblk1.u1_isp8_prom/pmi_ram_dqEnhprom_initsadn1
     8112048p12a15e99_1_1_0
         Type: DP8KC
Instance Name: I82/lm8_inst/LM8/genblk1.u1_isp8_prom/pmi_ram_dqEnhprom_initsadn1
     8112048p12a15e99_0_0_3
         Type: DP8KC
Instance Name: I82/lm8_inst/LM8/genblk1.u1_isp8_prom/pmi_ram_dqEnhprom_initsadn1
     8112048p12a15e99_0_1_2
         Type: DP8KC
Instance Name: I82/lm8_inst/LM8/genblk1.u1_isp8_prom/pmi_ram_dqEnhprom_initsadn1
     8112048p12a15e99_1_0_1

         Type: DP8KC
Instance Name: I82/lm8_inst/LM8/genblk3.u1_scratchpad/pmi_ram_dqEnhscratchpad_in
     itsadn8112048p12ef1db0_0_1_0
         Type: DP8KC
Instance Name: I82/lm8_inst/LM8/genblk3.u1_scratchpad/pmi_ram_dqEnhscratchpad_in
     itsadn8112048p12ef1db0_0_0_1
         Type: DP8KC
Instance Name: I53/PLLInst_0
         Type: EHXPLLJ



GSR Usage
---------

GSR Component:
   The local reset signal 'I82/lm8_inst/LM8/rst_n' of the design has been
        inferred as Global Set Reset (GSR). The reset signal used for GSR
        control is 'I82/lm8_inst/LM8/rst_n'.
        

     GSR Property:
   The design components with GSR property set to ENABLED will respond to global
        set reset while the components with GSR property set to DISABLED will
        not.
        

     Components on inferred reset domain with GSR Property disabled
--------------------------------------------------------------

     These components have the GSR property set to DISABLED and are on the
     inferred reset domain. The components will respond to the reset signal
     'I82/lm8_inst/LM8/rst_n' via the local reset on the component and not the
     GSR component.

     Type and number of components of the type: 
   Register = 12 

     Type and instance name of component: 
   Register : I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_flow_cntl/rst_n_reg
   Register : I82/lm8_inst/LM8/ext_wb_state
   Register : I82/lm8_inst/LM8/save_data[7]
   Register : I82/lm8_inst/LM8/u1_isp8_core/u1_lm8_flow_cntl/rst_exception
   Register : I82/lm8_inst/LM8/save_data[0]
   Register : I82/lm8_inst/LM8/save_data[1]
   Register : I82/lm8_inst/LM8/save_data[2]
   Register : I82/lm8_inst/LM8/save_data[3]
   Register : I82/lm8_inst/LM8/save_data[4]
   Register : I82/lm8_inst/LM8/save_data[5]
   Register : I82/lm8_inst/LM8/save_data[6]
   Register : I82/lm8_inst/LM8/genblk2.D_ACK_I_d



Run Time and Memory Usage
-------------------------

   Total CPU Time: 0 secs  
   Total REAL Time: 3 secs  
   Peak Memory Usage: 42 MB

        


























































Copyright (c) 1991-1994 by NeoCAD Inc. All rights reserved.
     Copyright (c) 1995 AT&T Corp.   All rights reserved.
     Copyright (c) 1995-2001 Lucent Technologies Inc.  All rights reserved.
     Copyright (c) 2001 Agere Systems   All rights reserved.
     Copyright (c) 2002-2016 Lattice Semiconductor Corporation,  All rights
     reserved.