Project Settings
Project Name proj_1 Implementation Name dos_gpio
Top Module dos_gpio_vhd Pipelining 1
Retiming 0 Resource Sharing 1
Fanout Guide 1000 Disable I/O Insertion 0
Disable Sequential Optimizations 0 Clock Conversion 1

Run Status
Job Name Status CPU Time Real Time Memory Date/Time
(compiler)Complete 7 1 0 - 0m:00s - 06/09/2017
1:10:25
(premap)Complete 2 0 0 0m:00s 0m:00s 140MB 06/09/2017
1:10:27
(fpga_mapper)Complete 11 1 0 0m:01s 0m:01s 143MB 06/09/2017
1:10:29
Multi-srs Generator Complete0m:01s06/09/2017
1:10:27

Area Summary
Register bits 0 I/O cells 18
Block RAMs (v_ram) 0 DSPs (dsp_used) 0
ORCA LUTs (total_luts) 0

Timing Summary
Clock NameReq FreqEst FreqSlack
System1.0 MHzNANA

Optimizations Summary
Combined Clock Conversion 0 / 0