#Build: Synplify Pro L-2016.03L-1, Build 097R, Jul 4 2016 #install: C:\lscc\diamond\3.8\synpbase #OS: Windows 8 6.2 #Hostname: RORDRIGO # Sat Sep 16 03:39:49 2017 #Implementation: proyecto_global Synopsys HDL Compiler, version comp2016q2rc, Build 192R, built Jul 5 2016 @N: : | Running in 64-bit mode Copyright (C) 1994-2016 Synopsys, Inc. All rights reserved. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited. Synopsys VHDL Compiler, version comp2016q2rc, Build 192R, built Jul 5 2016 @N: : | Running in 64-bit mode Copyright (C) 1994-2016 Synopsys, Inc. All rights reserved. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited. @N:CD720 : std.vhd(123) | Setting time resolution to ns @N: : dos_gpio_vhd.vhd(4) | Top entity is set to dos_gpio_vhd. VHDL syntax check successful! File C:\TFG\exp6\dos_gpio\soc\dos_gpio_vhd.vhd changed - recompiling At c_vhdl Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 69MB peak: 70MB) Process completed successfully. # Sat Sep 16 03:39:49 2017 ###########################################################] Synopsys Verilog Compiler, version comp2016q2rc, Build 192R, built Jul 5 2016 @N: : | Running in 64-bit mode Copyright (C) 1994-2016 Synopsys, Inc. All rights reserved. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited. @I::"C:\lscc\diamond\3.8\synpbase\lib\lucent\machxo2.v" (library work) @I::"C:\lscc\diamond\3.8\synpbase\lib\lucent\pmi_def.v" (library work) @I::"C:\lscc\diamond\3.8\synpbase\lib\vlog\hypermods.v" (library __hyper__lib__) @I::"C:\lscc\diamond\3.8\synpbase\lib\vlog\umr_capim.v" (library snps_haps) @I::"C:\lscc\diamond\3.8\synpbase\lib\vlog\scemi_objects.v" (library snps_haps) @I::"C:\lscc\diamond\3.8\synpbase\lib\vlog\scemi_pipes.svh" (library snps_haps) @I::"C:\TFG\exp6\proyecto_global\esquema_global.v" (library work) @I::"C:\TFG\exp6\dos_gpio\soc\dos_gpio.v" (library work) @I:"C:\TFG\exp6\dos_gpio\soc\dos_gpio.v":"C:\TFG\exp6\dos_gpio\soc\system_conf.v" (library work) @I:"C:\TFG\exp6\dos_gpio\soc\dos_gpio.v":"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_include_all.v" (library work) @I:"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_include_all.v":"C:\TFG\exp6\dos_gpio\soc\pmi_def.v" (library work) @I:"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_include_all.v":"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_include.v" (library work) @I:"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_include_all.v":"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_interrupt.v" (library work) @I:"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_include_all.v":"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_io_cntl.v" (library work) @I:"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_include_all.v":"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_flow_cntl.v" (library work) @I:"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_include_all.v":"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_idec.v" (library work) @I:"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_include_all.v":"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_alu.v" (library work) @I:"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_include_all.v":"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_core.v" (library work) @I:"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_include_all.v":"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_top.v" (library work) @I:"C:\TFG\exp6\dos_gpio\soc\dos_gpio.v":"C:\TFG\exp6\dos_gpio\soc\../components/gpio/rtl/verilog\gpio.v" (library work) @W:CG921 : gpio.v(252) | ipd_idx is already declared in this scope. @W:CG921 : gpio.v(262) | jpd_idx is already declared in this scope. @W:CG921 : gpio.v(273) | kpd_idx is already declared in this scope. @W:CG921 : gpio.v(284) | lpd_idx is already declared in this scope. @W:CG921 : gpio.v(390) | iopd_idx is already declared in this scope. @W:CG921 : gpio.v(400) | jopd_idx is already declared in this scope. @W:CG921 : gpio.v(411) | kopd_idx is already declared in this scope. @W:CG921 : gpio.v(422) | lopd_idx is already declared in this scope. @W:CG921 : gpio.v(432) | mopd_idx is already declared in this scope. @W:CG921 : gpio.v(442) | nopd_idx is already declared in this scope. @W:CG921 : gpio.v(453) | oopd_idx is already declared in this scope. @W:CG921 : gpio.v(464) | popd_idx is already declared in this scope. @W:CG921 : gpio.v(645) | iti is already declared in this scope. @W:CG921 : gpio.v(672) | jti is already declared in this scope. @W:CG921 : gpio.v(700) | kti is already declared in this scope. @W:CG921 : gpio.v(728) | lti is already declared in this scope. @W:CG921 : gpio.v(1112) | im_idx is already declared in this scope. @W:CG921 : gpio.v(1122) | jm_idx is already declared in this scope. @W:CG921 : gpio.v(1133) | km_idx is already declared in this scope. @W:CG921 : gpio.v(1144) | lm_idx is already declared in this scope. @W:CG921 : gpio.v(1155) | imb_idx is already declared in this scope. @W:CG921 : gpio.v(1165) | jmb_idx is already declared in this scope. @W:CG921 : gpio.v(1176) | kmb_idx is already declared in this scope. @W:CG921 : gpio.v(1187) | lmb_idx is already declared in this scope. @W:CG921 : gpio.v(1270) | i is already declared in this scope. @W:CG921 : gpio.v(1282) | j is already declared in this scope. @W:CG921 : gpio.v(1295) | k is already declared in this scope. @W:CG921 : gpio.v(1308) | l is already declared in this scope. @W:CG921 : gpio.v(1339) | i is already declared in this scope. @W:CG921 : gpio.v(1363) | j is already declared in this scope. @W:CG921 : gpio.v(1388) | k is already declared in this scope. @W:CG921 : gpio.v(1413) | l is already declared in this scope. @W:CG921 : gpio.v(1440) | i is already declared in this scope. @W:CG921 : gpio.v(1464) | j is already declared in this scope. @W:CG921 : gpio.v(1489) | k is already declared in this scope. @W:CG921 : gpio.v(1514) | l is already declared in this scope. @W:CG921 : gpio.v(1606) | iitb_idx is already declared in this scope. @W:CG921 : gpio.v(1618) | jitb_idx is already declared in this scope. @W:CG921 : gpio.v(1631) | kitb_idx is already declared in this scope. @W:CG921 : gpio.v(1644) | litb_idx is already declared in this scope. @W:CG921 : gpio.v(1773) | i_both is already declared in this scope. @W:CG921 : gpio.v(1796) | j_both is already declared in this scope. @W:CG921 : gpio.v(1820) | k_both is already declared in this scope. @W:CG921 : gpio.v(1844) | l_both is already declared in this scope. @I:"C:\TFG\exp6\dos_gpio\soc\dos_gpio.v":"C:\TFG\exp6\dos_gpio\soc\../components/gpio/rtl/verilog\tpio.v" (library work) Verilog syntax check successful! At c_ver Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 73MB peak: 74MB) Process completed successfully. # Sat Sep 16 03:39:49 2017 ###########################################################] @I::"C:\lscc\diamond\3.8\synpbase\lib\lucent\machxo2.v" (library work) @I::"C:\lscc\diamond\3.8\synpbase\lib\lucent\pmi_def.v" (library work) @I::"C:\lscc\diamond\3.8\synpbase\lib\vlog\hypermods.v" (library __hyper__lib__) @I::"C:\lscc\diamond\3.8\synpbase\lib\vlog\umr_capim.v" (library snps_haps) @I::"C:\lscc\diamond\3.8\synpbase\lib\vlog\scemi_objects.v" (library snps_haps) @I::"C:\lscc\diamond\3.8\synpbase\lib\vlog\scemi_pipes.svh" (library snps_haps) @I::"C:\TFG\exp6\proyecto_global\esquema_global.v" (library work) @I::"C:\TFG\exp6\dos_gpio\soc\dos_gpio.v" (library work) @I:"C:\TFG\exp6\dos_gpio\soc\dos_gpio.v":"C:\TFG\exp6\dos_gpio\soc\system_conf.v" (library work) @I:"C:\TFG\exp6\dos_gpio\soc\dos_gpio.v":"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_include_all.v" (library work) @I:"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_include_all.v":"C:\TFG\exp6\dos_gpio\soc\pmi_def.v" (library work) @I:"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_include_all.v":"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_include.v" (library work) @I:"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_include_all.v":"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_interrupt.v" (library work) @I:"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_include_all.v":"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_io_cntl.v" (library work) @I:"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_include_all.v":"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_flow_cntl.v" (library work) @I:"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_include_all.v":"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_idec.v" (library work) @I:"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_include_all.v":"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_alu.v" (library work) @I:"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_include_all.v":"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_core.v" (library work) @I:"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_include_all.v":"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_top.v" (library work) @I:"C:\TFG\exp6\dos_gpio\soc\dos_gpio.v":"C:\TFG\exp6\dos_gpio\soc\../components/gpio/rtl/verilog\gpio.v" (library work) @W:CG921 : gpio.v(252) | ipd_idx is already declared in this scope. @W:CG921 : gpio.v(262) | jpd_idx is already declared in this scope. @W:CG921 : gpio.v(273) | kpd_idx is already declared in this scope. @W:CG921 : gpio.v(284) | lpd_idx is already declared in this scope. @W:CG921 : gpio.v(390) | iopd_idx is already declared in this scope. @W:CG921 : gpio.v(400) | jopd_idx is already declared in this scope. @W:CG921 : gpio.v(411) | kopd_idx is already declared in this scope. @W:CG921 : gpio.v(422) | lopd_idx is already declared in this scope. @W:CG921 : gpio.v(432) | mopd_idx is already declared in this scope. @W:CG921 : gpio.v(442) | nopd_idx is already declared in this scope. @W:CG921 : gpio.v(453) | oopd_idx is already declared in this scope. @W:CG921 : gpio.v(464) | popd_idx is already declared in this scope. @W:CG921 : gpio.v(645) | iti is already declared in this scope. @W:CG921 : gpio.v(672) | jti is already declared in this scope. @W:CG921 : gpio.v(700) | kti is already declared in this scope. @W:CG921 : gpio.v(728) | lti is already declared in this scope. @W:CG921 : gpio.v(1112) | im_idx is already declared in this scope. @W:CG921 : gpio.v(1122) | jm_idx is already declared in this scope. @W:CG921 : gpio.v(1133) | km_idx is already declared in this scope. @W:CG921 : gpio.v(1144) | lm_idx is already declared in this scope. @W:CG921 : gpio.v(1155) | imb_idx is already declared in this scope. @W:CG921 : gpio.v(1165) | jmb_idx is already declared in this scope. @W:CG921 : gpio.v(1176) | kmb_idx is already declared in this scope. @W:CG921 : gpio.v(1187) | lmb_idx is already declared in this scope. @W:CG921 : gpio.v(1270) | i is already declared in this scope. @W:CG921 : gpio.v(1282) | j is already declared in this scope. @W:CG921 : gpio.v(1295) | k is already declared in this scope. @W:CG921 : gpio.v(1308) | l is already declared in this scope. @W:CG921 : gpio.v(1339) | i is already declared in this scope. @W:CG921 : gpio.v(1363) | j is already declared in this scope. @W:CG921 : gpio.v(1388) | k is already declared in this scope. @W:CG921 : gpio.v(1413) | l is already declared in this scope. @W:CG921 : gpio.v(1440) | i is already declared in this scope. @W:CG921 : gpio.v(1464) | j is already declared in this scope. @W:CG921 : gpio.v(1489) | k is already declared in this scope. @W:CG921 : gpio.v(1514) | l is already declared in this scope. @W:CG921 : gpio.v(1606) | iitb_idx is already declared in this scope. @W:CG921 : gpio.v(1618) | jitb_idx is already declared in this scope. @W:CG921 : gpio.v(1631) | kitb_idx is already declared in this scope. @W:CG921 : gpio.v(1644) | litb_idx is already declared in this scope. @W:CG921 : gpio.v(1773) | i_both is already declared in this scope. @W:CG921 : gpio.v(1796) | j_both is already declared in this scope. @W:CG921 : gpio.v(1820) | k_both is already declared in this scope. @W:CG921 : gpio.v(1844) | l_both is already declared in this scope. @I:"C:\TFG\exp6\dos_gpio\soc\dos_gpio.v":"C:\TFG\exp6\dos_gpio\soc\../components/gpio/rtl/verilog\tpio.v" (library work) Verilog syntax check successful! File C:\TFG\exp6\proyecto_global\synwork\_verilog_hintfile changed - recompiling File C:\TFG\exp6\dos_gpio\soc\dos_gpio.v changed - recompiling File C:\TFG\exp6\dos_gpio\soc\system_conf.v changed - recompiling File C:\TFG\exp6\dos_gpio\soc\pmi_def.v changed - recompiling File C:\TFG\exp6\dos_gpio\soc\system_conf.v changed - recompiling File C:\TFG\exp6\dos_gpio\soc\system_conf.v changed - recompiling File C:\TFG\exp6\dos_gpio\soc\system_conf.v changed - recompiling File C:\TFG\exp6\dos_gpio\soc\system_conf.v changed - recompiling @N:CG364 : machxo2.v(278) | Synthesizing module FD1S3AX in library work. @N:CG364 : machxo2.v(49) | Synthesizing module AND3 in library work. @N:CG364 : machxo2.v(43) | Synthesizing module AND2 in library work. @N:CG364 : machxo2.v(563) | Synthesizing module INV in library work. @N:CG364 : machxo2.v(56) | Synthesizing module AND4 in library work. @N:CG364 : machxo2.v(857) | Synthesizing module OB in library work. @N:CG364 : machxo2.v(498) | Synthesizing module IB in library work. @N:CG364 : machxo2.v(1120) | Synthesizing module VHI in library work. @N:CG364 : machxo2.v(1793) | Synthesizing module OSCH in library work. @N:CG364 : esquema_global.v(3) | Synthesizing module esquema_global in library work. @N:CG794 : esquema_global.v(77) | Using module div2 from library work @W:CG781 : esquema_global.v(77) | Input Aclr on instance I84 is undriven; assigning to 0. Simulation mismatch possible. Either assign the input or remove the declaration. @N:CG794 : esquema_global.v(78) | Using module junta_bus from library work @N:CG794 : esquema_global.v(80) | Using module dos_gpio_vhd from library work @N:CG794 : esquema_global.v(95) | Using module control_disp from library work @N:CG794 : esquema_global.v(97) | Using module cont_50mhz_1mhz from library work @W:CG781 : esquema_global.v(97) | Input Aclr on instance I52 is undriven; assigning to 0. Simulation mismatch possible. Either assign the input or remove the declaration. @N:CG794 : esquema_global.v(98) | Using module pll1 from library work @N:CG794 : esquema_global.v(110) | Using module cont_BCD from library work @N:CG794 : esquema_global.v(113) | Using module divfrec1 from library work @N:CG794 : esquema_global.v(146) | Using module DEC_DISP from library work At c_ver Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 73MB peak: 74MB) Process completed successfully. # Sat Sep 16 03:39:49 2017 ###########################################################] @N:CD720 : std.vhd(123) | Setting time resolution to ns @N: : div2.vhd(14) | Top entity is set to div2. File C:\TFG\exp6\dos_gpio\soc\dos_gpio_vhd.vhd changed - recompiling VHDL syntax check successful! @N:CD630 : DECODIF.vhd(4) | Synthesizing work.dec_disp.dec_disp_arch. Post processing for work.dec_disp.dec_disp_arch @N:CD630 : divfrec1.vhd(14) | Synthesizing work.divfrec1.structure. Post processing for work.divfrec1.structure @N:CD630 : cont_BCD.vhd(14) | Synthesizing work.cont_bcd.structure. Post processing for work.cont_bcd.structure @N:CD630 : pll1.vhd(14) | Synthesizing work.pll1.structure. Post processing for work.pll1.structure @N:CD630 : cont_50mhz_1mhz.vhd(14) | Synthesizing work.cont_50mhz_1mhz.structure. Post processing for work.cont_50mhz_1mhz.structure @N:CD630 : control_disp.vhd(5) | Synthesizing work.control_disp.control_arch. Post processing for work.control_disp.control_arch @N:CD630 : dos_gpio_vhd.vhd(4) | Synthesizing work.dos_gpio_vhd.dos_gpio_vhd_a. Post processing for work.dos_gpio_vhd.dos_gpio_vhd_a @N:CD630 : junta_bus.vhd(4) | Synthesizing work.junta_bus.junta_arch. Post processing for work.junta_bus.junta_arch @N:CD630 : div2.vhd(14) | Synthesizing work.div2.structure. Post processing for work.div2.structure At c_vhdl Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 70MB peak: 72MB) Process completed successfully. # Sat Sep 16 03:39:50 2017 ###########################################################] @I::"C:\lscc\diamond\3.8\synpbase\lib\lucent\machxo2.v" (library work) @I::"C:\lscc\diamond\3.8\synpbase\lib\lucent\pmi_def.v" (library work) @I::"C:\lscc\diamond\3.8\synpbase\lib\vlog\hypermods.v" (library __hyper__lib__) @I::"C:\lscc\diamond\3.8\synpbase\lib\vlog\umr_capim.v" (library snps_haps) @I::"C:\lscc\diamond\3.8\synpbase\lib\vlog\scemi_objects.v" (library snps_haps) @I::"C:\lscc\diamond\3.8\synpbase\lib\vlog\scemi_pipes.svh" (library snps_haps) @I::"C:\TFG\exp6\proyecto_global\esquema_global.v" (library work) @I::"C:\TFG\exp6\dos_gpio\soc\dos_gpio.v" (library work) @I:"C:\TFG\exp6\dos_gpio\soc\dos_gpio.v":"C:\TFG\exp6\dos_gpio\soc\system_conf.v" (library work) @I:"C:\TFG\exp6\dos_gpio\soc\dos_gpio.v":"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_include_all.v" (library work) @I:"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_include_all.v":"C:\TFG\exp6\dos_gpio\soc\pmi_def.v" (library work) @I:"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_include_all.v":"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_include.v" (library work) @I:"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_include_all.v":"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_interrupt.v" (library work) @I:"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_include_all.v":"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_io_cntl.v" (library work) @I:"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_include_all.v":"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_flow_cntl.v" (library work) @I:"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_include_all.v":"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_idec.v" (library work) @I:"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_include_all.v":"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_alu.v" (library work) @I:"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_include_all.v":"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_core.v" (library work) @I:"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_include_all.v":"C:\TFG\exp6\dos_gpio\soc\../components/lm8/rtl/verilog\lm8_top.v" (library work) @I:"C:\TFG\exp6\dos_gpio\soc\dos_gpio.v":"C:\TFG\exp6\dos_gpio\soc\../components/gpio/rtl/verilog\gpio.v" (library work) @W:CG921 : gpio.v(252) | ipd_idx is already declared in this scope. @W:CG921 : gpio.v(262) | jpd_idx is already declared in this scope. @W:CG921 : gpio.v(273) | kpd_idx is already declared in this scope. @W:CG921 : gpio.v(284) | lpd_idx is already declared in this scope. @W:CG921 : gpio.v(390) | iopd_idx is already declared in this scope. @W:CG921 : gpio.v(400) | jopd_idx is already declared in this scope. @W:CG921 : gpio.v(411) | kopd_idx is already declared in this scope. @W:CG921 : gpio.v(422) | lopd_idx is already declared in this scope. @W:CG921 : gpio.v(432) | mopd_idx is already declared in this scope. @W:CG921 : gpio.v(442) | nopd_idx is already declared in this scope. @W:CG921 : gpio.v(453) | oopd_idx is already declared in this scope. @W:CG921 : gpio.v(464) | popd_idx is already declared in this scope. @W:CG921 : gpio.v(645) | iti is already declared in this scope. @W:CG921 : gpio.v(672) | jti is already declared in this scope. @W:CG921 : gpio.v(700) | kti is already declared in this scope. @W:CG921 : gpio.v(728) | lti is already declared in this scope. @W:CG921 : gpio.v(1112) | im_idx is already declared in this scope. @W:CG921 : gpio.v(1122) | jm_idx is already declared in this scope. @W:CG921 : gpio.v(1133) | km_idx is already declared in this scope. @W:CG921 : gpio.v(1144) | lm_idx is already declared in this scope. @W:CG921 : gpio.v(1155) | imb_idx is already declared in this scope. @W:CG921 : gpio.v(1165) | jmb_idx is already declared in this scope. @W:CG921 : gpio.v(1176) | kmb_idx is already declared in this scope. @W:CG921 : gpio.v(1187) | lmb_idx is already declared in this scope. @W:CG921 : gpio.v(1270) | i is already declared in this scope. @W:CG921 : gpio.v(1282) | j is already declared in this scope. @W:CG921 : gpio.v(1295) | k is already declared in this scope. @W:CG921 : gpio.v(1308) | l is already declared in this scope. @W:CG921 : gpio.v(1339) | i is already declared in this scope. @W:CG921 : gpio.v(1363) | j is already declared in this scope. @W:CG921 : gpio.v(1388) | k is already declared in this scope. @W:CG921 : gpio.v(1413) | l is already declared in this scope. @W:CG921 : gpio.v(1440) | i is already declared in this scope. @W:CG921 : gpio.v(1464) | j is already declared in this scope. @W:CG921 : gpio.v(1489) | k is already declared in this scope. @W:CG921 : gpio.v(1514) | l is already declared in this scope. @W:CG921 : gpio.v(1606) | iitb_idx is already declared in this scope. @W:CG921 : gpio.v(1618) | jitb_idx is already declared in this scope. @W:CG921 : gpio.v(1631) | kitb_idx is already declared in this scope. @W:CG921 : gpio.v(1644) | litb_idx is already declared in this scope. @W:CG921 : gpio.v(1773) | i_both is already declared in this scope. @W:CG921 : gpio.v(1796) | j_both is already declared in this scope. @W:CG921 : gpio.v(1820) | k_both is already declared in this scope. @W:CG921 : gpio.v(1844) | l_both is already declared in this scope. @I:"C:\TFG\exp6\dos_gpio\soc\dos_gpio.v":"C:\TFG\exp6\dos_gpio\soc\../components/gpio/rtl/verilog\tpio.v" (library work) Verilog syntax check successful! @N:CG364 : dos_gpio.v(48) | Synthesizing module arbiter2 in library work. MAX_DAT_WIDTH=32'b00000000000000000000000000100000 WBS_DAT_WIDTH=32'b00000000000000000000000000100000 WBM0_DAT_WIDTH=32'b00000000000000000000000000001000 WBM1_DAT_WIDTH=32'b00000000000000000000000000001000 Generated name = arbiter2_32s_32s_8s_8s @N:CG364 : lm8_idec.v(47) | Synthesizing module lm8_idec in library work. PROM_AW=32'b00000000000000000000000000001011 Generated name = lm8_idec_11s @N:CG364 : pmi_def.v(69) | Synthesizing module pmi_addsub in library work. pmi_data_width=32'b00000000000000000000000000001000 pmi_result_width=32'b00000000000000000000000000001000 pmi_sign=24'b011011110110011001100110 pmi_family=16'b0100010101000011 module_type=80'b01110000011011010110100101011111011000010110010001100100011100110111010101100010 Generated name = pmi_addsub_8s_8s_off_EC_pmi_addsub @N:CG364 : lm8_alu.v(47) | Synthesizing module lm8_alu in library work. FAMILY_NAME=16'b0100010101000011 Generated name = lm8_alu_EC @N:CG364 : lm8_flow_cntl.v(49) | Synthesizing module lm8_flow_cntl in library work. PGM_STACK_AW=32'b00000000000000000000000000000100 PGM_STACK_AD=32'b00000000000000000000000000010000 STK_EBR=32'b00000000000000000000000000000000 PROM_WB=32'b00000000000000000000000000000000 PROM_AW=32'b00000000000000000000000000001011 FAMILY_NAME=16'b0100010101000011 Generated name = lm8_flow_cntl_4s_16s_0s_0s_11s_EC @W:CG296 : lm8_flow_cntl.v(226) | Incomplete sensitivity list - assuming completeness @W:CG290 : lm8_flow_cntl.v(235) | Referenced variable import_ is not in sensitivity list @W:CG290 : lm8_flow_cntl.v(235) | Referenced variable export_ is not in sensitivity list @N:CG364 : pmi_def.v(48) | Synthesizing module pmi_distributed_spram in library work. pmi_addr_depth=32'b00000000000000000000000000010000 pmi_addr_width=32'b00000000000000000000000000000100 pmi_data_width=32'b00000000000000000000000000001101 pmi_regmode=40'b0110111001101111011100100110010101100111 pmi_init_file=32'b01101110011011110110111001100101 pmi_init_file_format=48'b011000100110100101101110011000010111001001111001 pmi_family=16'b0100010101000011 module_type=168'b011100000110110101101001010111110110010001101001011100110111010001110010011010010110001001110101011101000110010101100100010111110111001101110000011100100110000101101101 Generated name = pmi_distributed_spram_16s_4s_13s_noreg_none_binary_EC_pmi_distributed_spram_1_layer2 @W:CG133 : lm8_flow_cntl.v(122) | Object fetch_cyc is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lm8_flow_cntl.v(123) | Object fetch_cyc_nxt is declared but not assigned. Either assign a value or remove the declaration. @N:CG364 : lm8_io_cntl.v(47) | Synthesizing module lm8_io_cntl in library work. @N:CG364 : lm8_interrupt.v(49) | Synthesizing module lm8_interrupt in library work. INTERRUPTS=32'b00000000000000000000000000001000 Generated name = lm8_interrupt_8s @N:CG364 : lm8_core.v(47) | Synthesizing module lm8_core in library work. FAMILY_NAME=16'b0100010101000011 EXT_AW=32'b00000000000000000000000000010000 PROM_WB=32'b00000000000000000000000000000000 PROM_AW=32'b00000000000000000000000000001011 PROM_AD=32'b00000000000000000000100000000000 REGISTERS_16=32'b00000000000000000000000000000000 REGISTER_EBR=32'b00000000000000000000000000000000 PGM_STACK_AW=32'b00000000000000000000000000000100 PGM_STACK_AD=32'b00000000000000000000000000010000 INTERRUPTS=32'b00000000000000000000000000001000 REG13=5'b01101 REG14=5'b01110 REG15=5'b01111 Generated name = lm8_core_Z2_layer2 @N:CG179 : lm8_core.v(352) | Removing redundant assignment. @N:CG364 : pmi_def.v(24) | Synthesizing module pmi_distributed_dpram in library work. pmi_addr_depth=32'b00000000000000000000000000100000 pmi_addr_width=32'b00000000000000000000000000000101 pmi_data_width=32'b00000000000000000000000000001000 pmi_regmode=40'b0110111001101111011100100110010101100111 pmi_init_file=32'b01101110011011110110111001100101 pmi_init_file_format=48'b011000100110100101101110011000010111001001111001 pmi_family=16'b0100010101000011 module_type=168'b011100000110110101101001010111110110010001101001011100110111010001110010011010010110001001110101011101000110010101100100010111110110010001110000011100100110000101101101 Generated name = pmi_distributed_dpram_32s_5s_8s_noreg_none_binary_EC_pmi_distributed_dpram_3_layer2 @W:CG133 : lm8_core.v(115) | Object page_ptr2 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lm8_core.v(115) | Object page_ptr3 is declared but not assigned. Either assign a value or remove the declaration. @N:CG364 : lm8_top.v(50) | Synthesizing module lm8 in library work. LATTICE_FAMILY=16'b0100010101000011 CFG_ROM_EN=32'b00000000000000000000000000000000 CFG_ROM_BASE_ADDRESS=32'b00000000000000000000000000000000 I_CFG_XIP=32'b00000000000000000000000000000000 CFG_PROM_INIT_FILE=352'b0100001100111010001011110101010001000110010001110010111101100101011110000111000000110110001011110110010001101111011100110101111101100111011100000110100101101111001011110110001101101111011001000101111101100011011011110110111001110100011100100010111101110000011100100110111101101101010111110110100101101110011010010111010000101110011011010110010101101101 CFG_PROM_INIT_FILE_FORMAT=24'b011010000110010101111000 CFG_PROM_SIZE=32'b00000000000000000000100000000000 CFG_PROM_BASE_ADDRESS=32'b00000000000000000000000000000000 CFG_SP_INIT_FILE=400'b0100001100111010001011110101010001000110010001110010111101100101011110000111000000110110001011110110010001101111011100110101111101100111011100000110100101101111001011110110001101101111011001000101111101100011011011110110111001110100011100100010111101110011011000110111001001100001011101000110001101101000011100000110000101100100010111110110100101101110011010010111010000101110011011010110010101101101 CFG_SP_INIT_FILE_FORMAT=24'b011010000110010101111000 SP_PORT_ENABLE=32'b00000000000000000000000000000001 SP_SIZE=32'b00000000000000000000100000000000 SP_BASE_ADDRESS=32'b00000000000000000000000000000000 CFG_IO_BASE_ADDRESS=32'b10000000000000000000000000000000 CFG_EXT_SIZE_8=32'b00000000000000000000000000000000 CFG_EXT_SIZE_16=32'b00000000000000000000000000000001 CFG_EXT_SIZE_32=32'b00000000000000000000000000000000 CFG_REGISTER_16=32'b00000000000000000000000000000000 CFG_REGISTER_32=32'b00000000000000000000000000000001 CFG_EBR=32'b00000000000000000000000000000000 CFG_DISTRIBUTED_RAM=32'b00000000000000000000000000000001 CFG_CALL_STACK_8=32'b00000000000000000000000000000000 CFG_CALL_STACK_16=32'b00000000000000000000000000000001 CFG_CALL_STACK_32=32'b00000000000000000000000000000000 INTERRUPTS=32'b00000000000000000000000000001000 CFG_EXT_SIZE=32'b00000000000000000000000000010000 CFG_CALL_STACK=32'b00000000000000000000000000010000 PROM_AW=32'b00000000000000000000000000001011 ALIGN_PROM_ROM_BASE=32'b00000000000000000000000000000000 SP_AW=32'b00000000000000000000000000001011 ALIGN_SP_BASE=32'b00000000000000000000000000000000 ALIGN_SP_ROM_BASE=32'b00000000000000000001100000000000 ALIGN_IO_BASE=32'b10000000000000000000000000000000 PGM_STACK_AW=32'b00000000000000000000000000000100 INTERNAL_SP_CHECK=32'b00000000000000000000000000000000 Generated name = lm8_Z4_layer2 @N:CG364 : pmi_def.v(115) | Synthesizing module pmi_ram_dq in library work. pmi_addr_depth=32'b00000000000000000000100000000000 pmi_addr_width=32'b00000000000000000000000000001011 pmi_data_width=32'b00000000000000000000000000010010 pmi_regmode=40'b0110111001101111011100100110010101100111 pmi_gsr=56'b01100100011010010111001101100001011000100110110001100101 pmi_resetmode=40'b0110000101110011011110010110111001100011 pmi_optimization=40'b0111001101110000011001010110010101100100 pmi_init_file=352'b0100001100111010001011110101010001000110010001110010111101100101011110000111000000110110001011110110010001101111011100110101111101100111011100000110100101101111001011110110001101101111011001000101111101100011011011110110111001110100011100100010111101110000011100100110111101101101010111110110100101101110011010010111010000101110011011010110010101101101 pmi_init_file_format=24'b011010000110010101111000 pmi_write_mode=48'b011011100110111101110010011011010110000101101100 pmi_family=16'b0100010101000011 module_type=80'b01110000011011010110100101011111011100100110000101101101010111110110010001110001 Generated name = pmi_ram_dq_Z5_layer2 @W:CG133 : lm8_top.v(363) | Object first_fetch_nxt is declared but not assigned. Either assign a value or remove the declaration. @N:CG364 : pmi_def.v(115) | Synthesizing module pmi_ram_dq in library work. pmi_addr_depth=32'b00000000000000000000100000000000 pmi_addr_width=32'b00000000000000000000000000001011 pmi_data_width=32'b00000000000000000000000000001000 pmi_regmode=40'b0110111001101111011100100110010101100111 pmi_gsr=56'b01100100011010010111001101100001011000100110110001100101 pmi_resetmode=40'b0110000101110011011110010110111001100011 pmi_optimization=40'b0111001101110000011001010110010101100100 pmi_init_file=400'b0100001100111010001011110101010001000110010001110010111101100101011110000111000000110110001011110110010001101111011100110101111101100111011100000110100101101111001011110110001101101111011001000101111101100011011011110110111001110100011100100010111101110011011000110111001001100001011101000110001101101000011100000110000101100100010111110110100101101110011010010111010000101110011011010110010101101101 pmi_init_file_format=24'b011010000110010101111000 pmi_write_mode=48'b011011100110111101110010011011010110000101101100 pmi_family=16'b0100010101000011 module_type=80'b01110000011011010110100101011111011100100110000101101101010111110110010001110001 Generated name = pmi_ram_dq_Z6_layer2 @W:CG133 : lm8_top.v(86) | Object I_CYC_O is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lm8_top.v(87) | Object I_STB_O is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lm8_top.v(88) | Object I_CTI_O is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lm8_top.v(89) | Object I_BTE_O is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lm8_top.v(90) | Object I_WE_O is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lm8_top.v(91) | Object I_SEL_O is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lm8_top.v(92) | Object I_DAT_O is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lm8_top.v(93) | Object I_ADR_O is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lm8_top.v(94) | Object I_LOCK_O is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lm8_top.v(211) | Object prom_waddr is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lm8_top.v(211) | Object prom_raddr is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lm8_top.v(212) | Object prom_wdata is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lm8_top.v(214) | Object sp_waddr is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lm8_top.v(214) | Object sp_raddr is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lm8_top.v(215) | Object sp_wdata is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lm8_top.v(226) | Object prom_wb_addr is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lm8_top.v(226) | Object prom_wb_addr_nxt is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lm8_top.v(227) | Object prom_wb_instr is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lm8_top.v(227) | Object prom_wb_instr_nxt is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lm8_top.v(228) | Object prom_wb_state is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lm8_top.v(228) | Object prom_wb_state_nxt is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lm8_top.v(412) | Object ext_din is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lm8_top.v(414) | Object sp_rd_addr is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lm8_top.v(414) | Object sp_rd_addr_nxt is declared but not assigned. Either assign a value or remove the declaration. @W:CG360 : lm8_top.v(643) | Removing wire core_start, as there is no assignment to it. @W:CG133 : lm8_top.v(644) | Object prom_copy_done is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lm8_top.v(644) | Object prom_copy_done_nxt is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lm8_top.v(645) | Object sp_copy_done is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lm8_top.v(645) | Object sp_copy_done_nxt is declared but not assigned. Either assign a value or remove the declaration. @N:CG364 : gpio.v(80) | Synthesizing module gpio in library work. GPIO_WB_DAT_WIDTH=32'b00000000000000000000000000100000 GPIO_WB_ADR_WIDTH=32'b00000000000000000000000000000100 DATA_WIDTH=32'b00000000000000000000000000001100 INPUT_WIDTH=32'b00000000000000000000000000000001 OUTPUT_WIDTH=32'b00000000000000000000000000000001 IRQ_MODE=32'b00000000000000000000000000000000 LEVEL=32'b00000000000000000000000000000000 EDGE=32'b00000000000000000000000000000001 POSE_EDGE_IRQ=32'b00000000000000000000000000000001 NEGE_EDGE_IRQ=32'b00000000000000000000000000000000 EITHER_EDGE_IRQ=32'b00000000000000000000000000000000 INPUT_PORTS_ONLY=32'b00000000000000000000000000000001 OUTPUT_PORTS_ONLY=32'b00000000000000000000000000000000 BOTH_INPUT_AND_OUTPUT=32'b00000000000000000000000000000000 TRISTATE_PORTS=32'b00000000000000000000000000000000 UDLY=32'b00000000000000000000000000000001 Generated name = gpio_Z7_layer2 @N:CG364 : machxo2.v(82) | Synthesizing module BB in library work. @N:CG364 : tpio.v(66) | Synthesizing module tpio in library work. DATA_WIDTH=32'b00000000000000000000000000000001 IRQ_MODE=32'b00000000000000000000000000000000 LEVEL=32'b00000000000000000000000000000000 EDGE=32'b00000000000000000000000000000001 POSE_EDGE_IRQ=32'b00000000000000000000000000000001 NEGE_EDGE_IRQ=32'b00000000000000000000000000000000 EITHER_EDGE_IRQ=32'b00000000000000000000000000000000 UDLY=32'b00000000000000000000000000000001 Generated name = tpio_1s_0s_0s_1s_1s_0s_0s_1s @W:CG133 : tpio.v(109) | Object IRQ_MASK is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : tpio.v(110) | Object IRQ_TEMP is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : tpio.v(111) | Object EDGE_CAPTURE is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : tpio.v(112) | Object PIO_DATA_DLY is declared but not assigned. Either assign a value or remove the declaration. @W:CG360 : gpio.v(123) | Removing wire PIO_OUT, as there is no assignment to it. @W:CG360 : gpio.v(124) | Removing wire PIO_BOTH_OUT, as there is no assignment to it. @W:CG133 : gpio.v(145) | Object PIO_DATAO is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(146) | Object PIO_DATAI is declared but not assigned. Either assign a value or remove the declaration. @W:CG360 : gpio.v(151) | Removing wire PIO_DATA_WR_EN_0, as there is no assignment to it. @W:CG360 : gpio.v(151) | Removing wire PIO_DATA_WR_EN_1, as there is no assignment to it. @W:CG360 : gpio.v(151) | Removing wire PIO_DATA_WR_EN_2, as there is no assignment to it. @W:CG360 : gpio.v(151) | Removing wire PIO_DATA_WR_EN_3, as there is no assignment to it. @W:CG360 : gpio.v(154) | Removing wire PIO_TRI_WR_EN_0, as there is no assignment to it. @W:CG360 : gpio.v(154) | Removing wire PIO_TRI_WR_EN_1, as there is no assignment to it. @W:CG360 : gpio.v(154) | Removing wire PIO_TRI_WR_EN_2, as there is no assignment to it. @W:CG360 : gpio.v(154) | Removing wire PIO_TRI_WR_EN_3, as there is no assignment to it. @W:CG360 : gpio.v(157) | Removing wire IRQ_MASK_WR_EN_0, as there is no assignment to it. @W:CG360 : gpio.v(157) | Removing wire IRQ_MASK_WR_EN_1, as there is no assignment to it. @W:CG360 : gpio.v(157) | Removing wire IRQ_MASK_WR_EN_2, as there is no assignment to it. @W:CG360 : gpio.v(157) | Removing wire IRQ_MASK_WR_EN_3, as there is no assignment to it. @W:CG360 : gpio.v(160) | Removing wire EDGE_CAP_WR_EN_0, as there is no assignment to it. @W:CG360 : gpio.v(160) | Removing wire EDGE_CAP_WR_EN_1, as there is no assignment to it. @W:CG360 : gpio.v(160) | Removing wire EDGE_CAP_WR_EN_2, as there is no assignment to it. @W:CG360 : gpio.v(160) | Removing wire EDGE_CAP_WR_EN_3, as there is no assignment to it. @W:CG133 : gpio.v(167) | Object IRQ_MASK is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(168) | Object IRQ_MASK_BOTH is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(169) | Object IRQ_TEMP is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(170) | Object IRQ_TEMP_BOTH is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(171) | Object EDGE_CAPTURE is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(172) | Object EDGE_CAPTURE_BOTH is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(173) | Object PIO_DATA_DLY is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(174) | Object PIO_DATA_DLY_BOTH is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(252) | Object ipd_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(262) | Object jpd_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(273) | Object kpd_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(284) | Object lpd_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(390) | Object iopd_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(400) | Object jopd_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(411) | Object kopd_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(422) | Object lopd_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(432) | Object mopd_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(442) | Object nopd_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(453) | Object oopd_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(464) | Object popd_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(700) | Object kti is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(728) | Object lti is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1112) | Object im_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1122) | Object jm_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1133) | Object km_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1144) | Object lm_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1155) | Object imb_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1165) | Object jmb_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1176) | Object kmb_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1187) | Object lmb_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1440) | Object i is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1464) | Object j is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1489) | Object k is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1514) | Object l is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1606) | Object iitb_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1618) | Object jitb_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1631) | Object kitb_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1644) | Object litb_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1773) | Object i_both is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1796) | Object j_both is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1820) | Object k_both is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1844) | Object l_both is declared but not assigned. Either assign a value or remove the declaration. @N:CG364 : gpio.v(80) | Synthesizing module gpio in library work. GPIO_WB_DAT_WIDTH=32'b00000000000000000000000000100000 GPIO_WB_ADR_WIDTH=32'b00000000000000000000000000000100 DATA_WIDTH=32'b00000000000000000000000000001100 INPUT_WIDTH=32'b00000000000000000000000000000001 OUTPUT_WIDTH=32'b00000000000000000000000000000001 IRQ_MODE=32'b00000000000000000000000000000000 LEVEL=32'b00000000000000000000000000000000 EDGE=32'b00000000000000000000000000000001 POSE_EDGE_IRQ=32'b00000000000000000000000000000001 NEGE_EDGE_IRQ=32'b00000000000000000000000000000000 EITHER_EDGE_IRQ=32'b00000000000000000000000000000000 INPUT_PORTS_ONLY=32'b00000000000000000000000000000000 OUTPUT_PORTS_ONLY=32'b00000000000000000000000000000001 BOTH_INPUT_AND_OUTPUT=32'b00000000000000000000000000000000 TRISTATE_PORTS=32'b00000000000000000000000000000000 UDLY=32'b00000000000000000000000000000001 Generated name = gpio_Z8_layer2 @W:CG133 : gpio.v(145) | Object PIO_DATAO is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(146) | Object PIO_DATAI is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(167) | Object IRQ_MASK is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(168) | Object IRQ_MASK_BOTH is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(169) | Object IRQ_TEMP is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(170) | Object IRQ_TEMP_BOTH is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(171) | Object EDGE_CAPTURE is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(172) | Object EDGE_CAPTURE_BOTH is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(173) | Object PIO_DATA_DLY is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(174) | Object PIO_DATA_DLY_BOTH is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(273) | Object kpd_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(284) | Object lpd_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(390) | Object iopd_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(400) | Object jopd_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(411) | Object kopd_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(422) | Object lopd_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(432) | Object mopd_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(442) | Object nopd_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(453) | Object oopd_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(464) | Object popd_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(700) | Object kti is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(728) | Object lti is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1112) | Object im_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1122) | Object jm_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1133) | Object km_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1144) | Object lm_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1155) | Object imb_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1165) | Object jmb_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1176) | Object kmb_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1187) | Object lmb_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1440) | Object i is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1464) | Object j is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1489) | Object k is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1514) | Object l is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1606) | Object iitb_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1618) | Object jitb_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1631) | Object kitb_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1644) | Object litb_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1773) | Object i_both is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1796) | Object j_both is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1820) | Object k_both is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1844) | Object l_both is declared but not assigned. Either assign a value or remove the declaration. @N:CG364 : gpio.v(80) | Synthesizing module gpio in library work. GPIO_WB_DAT_WIDTH=32'b00000000000000000000000000100000 GPIO_WB_ADR_WIDTH=32'b00000000000000000000000000000100 DATA_WIDTH=32'b00000000000000000000000000000100 INPUT_WIDTH=32'b00000000000000000000000000000001 OUTPUT_WIDTH=32'b00000000000000000000000000000001 IRQ_MODE=32'b00000000000000000000000000000000 LEVEL=32'b00000000000000000000000000000000 EDGE=32'b00000000000000000000000000000001 POSE_EDGE_IRQ=32'b00000000000000000000000000000001 NEGE_EDGE_IRQ=32'b00000000000000000000000000000000 EITHER_EDGE_IRQ=32'b00000000000000000000000000000000 INPUT_PORTS_ONLY=32'b00000000000000000000000000000001 OUTPUT_PORTS_ONLY=32'b00000000000000000000000000000000 BOTH_INPUT_AND_OUTPUT=32'b00000000000000000000000000000000 TRISTATE_PORTS=32'b00000000000000000000000000000000 UDLY=32'b00000000000000000000000000000001 Generated name = gpio_Z9_layer2 @W:CG133 : gpio.v(145) | Object PIO_DATAO is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(146) | Object PIO_DATAI is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(167) | Object IRQ_MASK is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(168) | Object IRQ_MASK_BOTH is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(169) | Object IRQ_TEMP is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(170) | Object IRQ_TEMP_BOTH is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(171) | Object EDGE_CAPTURE is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(172) | Object EDGE_CAPTURE_BOTH is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(173) | Object PIO_DATA_DLY is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(174) | Object PIO_DATA_DLY_BOTH is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(252) | Object ipd_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(262) | Object jpd_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(273) | Object kpd_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(284) | Object lpd_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(390) | Object iopd_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(400) | Object jopd_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(411) | Object kopd_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(422) | Object lopd_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(432) | Object mopd_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(442) | Object nopd_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(453) | Object oopd_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(464) | Object popd_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(672) | Object jti is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(700) | Object kti is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(728) | Object lti is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1112) | Object im_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1122) | Object jm_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1133) | Object km_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1144) | Object lm_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1155) | Object imb_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1165) | Object jmb_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1176) | Object kmb_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1187) | Object lmb_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1440) | Object i is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1464) | Object j is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1489) | Object k is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1514) | Object l is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1606) | Object iitb_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1618) | Object jitb_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1631) | Object kitb_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1644) | Object litb_idx is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1773) | Object i_both is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1796) | Object j_both is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1820) | Object k_both is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : gpio.v(1844) | Object l_both is declared but not assigned. Either assign a value or remove the declaration. @N:CG364 : dos_gpio.v(332) | Synthesizing module dos_gpio in library work. @W:CG781 : dos_gpio.v(570) | Input PIO_BOTH_IN on instance gpioent is undriven; assigning to 0. Simulation mismatch possible. Either assign the input or remove the declaration. @W:CG781 : dos_gpio.v(611) | Input PIO_IN on instance gpiosal is undriven; assigning to 0. Simulation mismatch possible. Either assign the input or remove the declaration. @W:CG781 : dos_gpio.v(611) | Input PIO_BOTH_IN on instance gpiosal is undriven; assigning to 0. Simulation mismatch possible. Either assign the input or remove the declaration. @W:CG781 : dos_gpio.v(652) | Input PIO_BOTH_IN on instance gpiocont is undriven; assigning to 0. Simulation mismatch possible. Either assign the input or remove the declaration. @W:CG133 : dos_gpio.v(339) | Object i is declared but not assigned. Either assign a value or remove the declaration. @W:CG360 : dos_gpio.v(355) | Removing wire SHAREDBUS_en, as there is no assignment to it. @W:CL246 : gpio.v(110) | Input port bits 1 to 0 of GPIO_ADR_I[3:0] are unused. Assign logic for all port bits or change the input port size. @W:CL246 : gpio.v(111) | Input port bits 31 to 28 of GPIO_DAT_I[31:0] are unused. Assign logic for all port bits or change the input port size. @W:CL246 : gpio.v(111) | Input port bits 23 to 0 of GPIO_DAT_I[31:0] are unused. Assign logic for all port bits or change the input port size. @W:CL246 : gpio.v(112) | Input port bits 2 to 0 of GPIO_SEL_I[3:0] are unused. Assign logic for all port bits or change the input port size. @W:CL157 : gpio.v(123) | *Output PIO_OUT has undriven bits; assigning undriven bits to 0. Simulation mismatch possible. Assign all bits of the output. @W:CL157 : gpio.v(124) | *Output PIO_BOTH_OUT has undriven bits; assigning undriven bits to 0. Simulation mismatch possible. Assign all bits of the output. @N:CL159 : gpio.v(104) | Input GPIO_CYC_I is unused. @N:CL159 : gpio.v(107) | Input GPIO_LOCK_I is unused. @N:CL159 : gpio.v(108) | Input GPIO_CTI_I is unused. @N:CL159 : gpio.v(109) | Input GPIO_BTE_I is unused. @N:CL159 : gpio.v(122) | Input PIO_BOTH_IN is unused. @W:CL246 : gpio.v(110) | Input port bits 1 to 0 of GPIO_ADR_I[3:0] are unused. Assign logic for all port bits or change the input port size. @W:CL246 : gpio.v(111) | Input port bits 23 to 20 of GPIO_DAT_I[31:0] are unused. Assign logic for all port bits or change the input port size. @W:CL246 : gpio.v(111) | Input port bits 15 to 0 of GPIO_DAT_I[31:0] are unused. Assign logic for all port bits or change the input port size. @W:CL246 : gpio.v(112) | Input port bits 1 to 0 of GPIO_SEL_I[3:0] are unused. Assign logic for all port bits or change the input port size. @W:CL157 : gpio.v(124) | *Output PIO_BOTH_OUT has undriven bits; assigning undriven bits to 0. Simulation mismatch possible. Assign all bits of the output. @N:CL159 : gpio.v(104) | Input GPIO_CYC_I is unused. @N:CL159 : gpio.v(107) | Input GPIO_LOCK_I is unused. @N:CL159 : gpio.v(108) | Input GPIO_CTI_I is unused. @N:CL159 : gpio.v(109) | Input GPIO_BTE_I is unused. @N:CL159 : gpio.v(121) | Input PIO_IN is unused. @N:CL159 : gpio.v(122) | Input PIO_BOTH_IN is unused. @A:CL153 : tpio.v(109) | *Unassigned bits of IRQ_MASK are referenced and tied to 0 -- simulation mismatch possible. @N:CL159 : tpio.v(98) | Input IRQ_MASK_WR_EN is unused. @N:CL159 : tpio.v(99) | Input EDGE_CAP_WR_EN is unused. @W:CL246 : gpio.v(110) | Input port bits 1 to 0 of GPIO_ADR_I[3:0] are unused. Assign logic for all port bits or change the input port size. @W:CL246 : gpio.v(111) | Input port bits 23 to 20 of GPIO_DAT_I[31:0] are unused. Assign logic for all port bits or change the input port size. @W:CL246 : gpio.v(111) | Input port bits 15 to 0 of GPIO_DAT_I[31:0] are unused. Assign logic for all port bits or change the input port size. @W:CL246 : gpio.v(112) | Input port bits 1 to 0 of GPIO_SEL_I[3:0] are unused. Assign logic for all port bits or change the input port size. @W:CL157 : gpio.v(123) | *Output PIO_OUT has undriven bits; assigning undriven bits to 0. Simulation mismatch possible. Assign all bits of the output. @W:CL157 : gpio.v(124) | *Output PIO_BOTH_OUT has undriven bits; assigning undriven bits to 0. Simulation mismatch possible. Assign all bits of the output. @N:CL159 : gpio.v(104) | Input GPIO_CYC_I is unused. @N:CL159 : gpio.v(107) | Input GPIO_LOCK_I is unused. @N:CL159 : gpio.v(108) | Input GPIO_CTI_I is unused. @N:CL159 : gpio.v(109) | Input GPIO_BTE_I is unused. @N:CL159 : gpio.v(122) | Input PIO_BOTH_IN is unused. @A:CL153 : lm8_top.v(86) | *Unassigned bits of I_CYC_O are referenced and tied to 0 -- simulation mismatch possible. @A:CL153 : lm8_top.v(87) | *Unassigned bits of I_STB_O are referenced and tied to 0 -- simulation mismatch possible. @A:CL153 : lm8_top.v(88) | *Unassigned bits of I_CTI_O[2:0] are referenced and tied to 0 -- simulation mismatch possible. @A:CL153 : lm8_top.v(89) | *Unassigned bits of I_BTE_O[1:0] are referenced and tied to 0 -- simulation mismatch possible. @A:CL153 : lm8_top.v(90) | *Unassigned bits of I_WE_O are referenced and tied to 0 -- simulation mismatch possible. @A:CL153 : lm8_top.v(91) | *Unassigned bits of I_SEL_O are referenced and tied to 0 -- simulation mismatch possible. @A:CL153 : lm8_top.v(92) | *Unassigned bits of I_DAT_O[7:0] are referenced and tied to 0 -- simulation mismatch possible. @A:CL153 : lm8_top.v(93) | *Unassigned bits of I_ADR_O[31:0] are referenced and tied to 0 -- simulation mismatch possible. @A:CL153 : lm8_top.v(94) | *Unassigned bits of I_LOCK_O are referenced and tied to 0 -- simulation mismatch possible. @N:CL159 : lm8_top.v(82) | Input I_ACK_I is unused. @N:CL159 : lm8_top.v(83) | Input I_ERR_I is unused. @N:CL159 : lm8_top.v(84) | Input I_RTY_I is unused. @N:CL159 : lm8_top.v(85) | Input I_DAT_I is unused. @N:CL159 : lm8_top.v(97) | Input D_ERR_I is unused. @N:CL159 : lm8_top.v(98) | Input D_RTY_I is unused. @N:CL159 : lm8_flow_cntl.v(73) | Input prom_ready is unused. @W:CL246 : lm8_alu.v(52) | Input port bits 13 to 2 of instr[17:0] are unused. Assign logic for all port bits or change the input port size. @N:CL201 : dos_gpio.v(246) | Trying to extract state machine for register selected. Extracted state machine for register selected State machine has 3 reachable states with original encodings of: 00 01 10 At c_ver Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 78MB peak: 81MB) Process completed successfully. # Sat Sep 16 03:39:50 2017 ###########################################################] Synopsys Netlist Linker, version comp2016q2rc, Build 192R, built Jul 5 2016 @N: : | Running in 64-bit mode File C:\TFG\exp6\proyecto_global\synwork\layer0.srs changed - recompiling File C:\TFG\exp6\proyecto_global\synwork\layer1.srs changed - recompiling File C:\TFG\exp6\proyecto_global\synwork\layer2.srs changed - recompiling @W:Z198 : divfrec1.vhd(211) | Unbound component ROM16X1A of instance LUT4_7 @W:Z198 : divfrec1.vhd(216) | Unbound component ROM16X1A of instance LUT4_6 @W:Z198 : divfrec1.vhd(221) | Unbound component ROM16X1A of instance LUT4_5 @W:Z198 : divfrec1.vhd(226) | Unbound component ROM16X1A of instance LUT4_4 @W:Z198 : divfrec1.vhd(231) | Unbound component ROM16X1A of instance LUT4_3 @W:Z198 : divfrec1.vhd(236) | Unbound component ROM16X1A of instance LUT4_2 @W:Z198 : divfrec1.vhd(241) | Unbound component ROM16X1A of instance LUT4_1 @W:Z198 : divfrec1.vhd(247) | Unbound component ROM16X1A of instance LUT4_0 @W:Z198 : divfrec1.vhd(252) | Unbound component MUX21 of instance muxb_20 @W:Z198 : divfrec1.vhd(256) | Unbound component MUX21 of instance muxb_19 @W:Z198 : divfrec1.vhd(260) | Unbound component MUX21 of instance muxb_18 @W:Z198 : divfrec1.vhd(264) | Unbound component MUX21 of instance muxb_17 @W:Z198 : divfrec1.vhd(268) | Unbound component MUX21 of instance muxb_16 @W:Z198 : divfrec1.vhd(272) | Unbound component MUX21 of instance muxb_15 @W:Z198 : divfrec1.vhd(276) | Unbound component MUX21 of instance muxb_14 @W:Z198 : divfrec1.vhd(280) | Unbound component MUX21 of instance muxb_13 @W:Z198 : divfrec1.vhd(284) | Unbound component MUX21 of instance muxb_12 @W:Z198 : divfrec1.vhd(288) | Unbound component MUX21 of instance muxb_11 @W:Z198 : divfrec1.vhd(292) | Unbound component MUX21 of instance muxb_10 @W:Z198 : divfrec1.vhd(296) | Unbound component MUX21 of instance muxb_9 @W:Z198 : divfrec1.vhd(300) | Unbound component MUX21 of instance muxb_8 @W:Z198 : divfrec1.vhd(304) | Unbound component MUX21 of instance muxb_7 @W:Z198 : divfrec1.vhd(308) | Unbound component MUX21 of instance muxb_6 @W:Z198 : divfrec1.vhd(312) | Unbound component MUX21 of instance muxb_5 @W:Z198 : divfrec1.vhd(316) | Unbound component MUX21 of instance muxb_4 @W:Z198 : divfrec1.vhd(320) | Unbound component MUX21 of instance muxb_3 @W:Z198 : divfrec1.vhd(324) | Unbound component MUX21 of instance muxb_2 @W:Z198 : divfrec1.vhd(328) | Unbound component MUX21 of instance muxb_1 @W:Z198 : divfrec1.vhd(332) | Unbound component MUX21 of instance muxb_0 @W:Z198 : divfrec1.vhd(336) | Unbound component FD1P3DX of instance FF_20 @W:Z198 : divfrec1.vhd(340) | Unbound component FD1P3DX of instance FF_19 @W:Z198 : divfrec1.vhd(344) | Unbound component FD1P3DX of instance FF_18 @W:Z198 : divfrec1.vhd(348) | Unbound component FD1P3DX of instance FF_17 @W:Z198 : divfrec1.vhd(352) | Unbound component FD1P3DX of instance FF_16 @W:Z198 : divfrec1.vhd(356) | Unbound component FD1P3DX of instance FF_15 @W:Z198 : divfrec1.vhd(360) | Unbound component FD1P3DX of instance FF_14 @W:Z198 : divfrec1.vhd(364) | Unbound component FD1P3DX of instance FF_13 @W:Z198 : divfrec1.vhd(368) | Unbound component FD1P3DX of instance FF_12 @W:Z198 : divfrec1.vhd(372) | Unbound component FD1P3DX of instance FF_11 @W:Z198 : divfrec1.vhd(376) | Unbound component FD1P3DX of instance FF_10 @W:Z198 : divfrec1.vhd(380) | Unbound component FD1P3DX of instance FF_9 @W:Z198 : divfrec1.vhd(384) | Unbound component FD1P3DX of instance FF_8 @W:Z198 : divfrec1.vhd(388) | Unbound component FD1P3DX of instance FF_7 @W:Z198 : divfrec1.vhd(392) | Unbound component FD1P3DX of instance FF_6 @W:Z198 : divfrec1.vhd(396) | Unbound component FD1P3DX of instance FF_5 @W:Z198 : divfrec1.vhd(400) | Unbound component FD1P3DX of instance FF_4 @W:Z198 : divfrec1.vhd(404) | Unbound component FD1P3DX of instance FF_3 @W:Z198 : divfrec1.vhd(408) | Unbound component FD1P3DX of instance FF_2 @W:Z198 : divfrec1.vhd(412) | Unbound component FD1P3DX of instance FF_1 @W:Z198 : divfrec1.vhd(416) | Unbound component FD1P3DX of instance FF_0 @W:Z198 : divfrec1.vhd(423) | Unbound component FADD2B of instance cnt_cia @W:Z198 : divfrec1.vhd(428) | Unbound component CU2 of instance cnt_0 @W:Z198 : divfrec1.vhd(432) | Unbound component CU2 of instance cnt_1 @W:Z198 : divfrec1.vhd(436) | Unbound component CU2 of instance cnt_2 @W:Z198 : divfrec1.vhd(440) | Unbound component CU2 of instance cnt_3 @W:Z198 : divfrec1.vhd(444) | Unbound component CU2 of instance cnt_4 @W:Z198 : divfrec1.vhd(448) | Unbound component CU2 of instance cnt_5 @W:Z198 : divfrec1.vhd(452) | Unbound component CU2 of instance cnt_6 @W:Z198 : divfrec1.vhd(456) | Unbound component CU2 of instance cnt_7 @W:Z198 : divfrec1.vhd(460) | Unbound component CU2 of instance cnt_8 @W:Z198 : divfrec1.vhd(464) | Unbound component CU2 of instance cnt_9 @W:Z198 : divfrec1.vhd(468) | Unbound component CU2 of instance cnt_10 @W:Z198 : divfrec1.vhd(472) | Unbound component VLO of instance scuba_vlo_inst @W:Z198 : cont_BCD.vhd(95) | Unbound component ROM16X1A of instance LUT4_0 @W:Z198 : cont_BCD.vhd(100) | Unbound component MUX21 of instance muxb_3 @W:Z198 : cont_BCD.vhd(104) | Unbound component MUX21 of instance muxb_2 @W:Z198 : cont_BCD.vhd(108) | Unbound component MUX21 of instance muxb_1 @W:Z198 : cont_BCD.vhd(112) | Unbound component MUX21 of instance muxb_0 @W:Z198 : cont_BCD.vhd(116) | Unbound component FD1P3DX of instance FF_3 @W:Z198 : cont_BCD.vhd(120) | Unbound component FD1P3DX of instance FF_2 @W:Z198 : cont_BCD.vhd(124) | Unbound component FD1P3DX of instance FF_1 @W:Z198 : cont_BCD.vhd(128) | Unbound component FD1P3DX of instance FF_0 @W:Z198 : cont_BCD.vhd(132) | Unbound component VLO of instance scuba_vlo_inst @W:Z198 : cont_BCD.vhd(138) | Unbound component FADD2B of instance cnt_cia @W:Z198 : cont_BCD.vhd(143) | Unbound component CU2 of instance cnt_0 @W:Z198 : cont_BCD.vhd(147) | Unbound component CU2 of instance cnt_1 @W:Z198 : pll1.vhd(105) | Unbound component VLO of instance scuba_vlo_inst @W:Z198 : pll1.vhd(108) | Unbound component EHXPLLJ of instance PLLInst_0 @W:Z198 : cont_50mhz_1mhz.vhd(109) | Unbound component ROM16X1A of instance LUT4_1 @W:Z198 : cont_50mhz_1mhz.vhd(114) | Unbound component ROM16X1A of instance LUT4_0 @W:Z198 : cont_50mhz_1mhz.vhd(119) | Unbound component MUX21 of instance muxb_5 @W:Z198 : cont_50mhz_1mhz.vhd(123) | Unbound component MUX21 of instance muxb_4 @W:Z198 : cont_50mhz_1mhz.vhd(127) | Unbound component MUX21 of instance muxb_3 @W:Z198 : cont_50mhz_1mhz.vhd(131) | Unbound component MUX21 of instance muxb_2 @W:Z198 : cont_50mhz_1mhz.vhd(135) | Unbound component MUX21 of instance muxb_1 @W:Z198 : cont_50mhz_1mhz.vhd(139) | Unbound component MUX21 of instance muxb_0 @W:Z198 : cont_50mhz_1mhz.vhd(143) | Unbound component FD1P3DX of instance FF_5 @W:Z198 : cont_50mhz_1mhz.vhd(147) | Unbound component FD1P3DX of instance FF_4 @W:Z198 : cont_50mhz_1mhz.vhd(151) | Unbound component FD1P3DX of instance FF_3 @W:Z198 : cont_50mhz_1mhz.vhd(155) | Unbound component FD1P3DX of instance FF_2 @W:Z198 : cont_50mhz_1mhz.vhd(159) | Unbound component FD1P3DX of instance FF_1 @W:Z198 : cont_50mhz_1mhz.vhd(163) | Unbound component FD1P3DX of instance FF_0 @W:Z198 : cont_50mhz_1mhz.vhd(167) | Unbound component VLO of instance scuba_vlo_inst @W:Z198 : cont_50mhz_1mhz.vhd(173) | Unbound component FADD2B of instance cnt_cia @W:Z198 : cont_50mhz_1mhz.vhd(178) | Unbound component CU2 of instance cnt_0 @W:Z198 : cont_50mhz_1mhz.vhd(182) | Unbound component CU2 of instance cnt_1 @W:Z198 : cont_50mhz_1mhz.vhd(186) | Unbound component CU2 of instance cnt_2 @W:Z198 : div2.vhd(60) | Unbound component FD1P3DX of instance FF_0 @W:Z198 : div2.vhd(67) | Unbound component FADD2B of instance cnt_cia @W:Z198 : div2.vhd(72) | Unbound component CU2 of instance cnt_0 @W:Z198 : div2.vhd(76) | Unbound component VLO of instance scuba_vlo_inst ======================================================================================= For a summary of linker messages for components that did not bind, please see log file: Linked File: proyecto_global_proyecto_global_comp.linkerlog ======================================================================================= At syn_nfilter Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 69MB peak: 70MB) Process took 0h:00m:01s realtime, 0h:00m:01s cputime Process completed successfully. # Sat Sep 16 03:39:51 2017 ###########################################################] @END At c_hdl Exit (Real Time elapsed 0h:00m:02s; CPU Time elapsed 0h:00m:01s; Memory used current: 3MB peak: 4MB) Process took 0h:00m:02s realtime, 0h:00m:01s cputime Process completed successfully. # Sat Sep 16 03:39:51 2017 ###########################################################] Synopsys Netlist Linker, version comp2016q2rc, Build 192R, built Jul 5 2016 @N: : | Running in 64-bit mode File C:\TFG\exp6\proyecto_global\synwork\proyecto_global_proyecto_global_comp.srs changed - recompiling At syn_nfilter Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 70MB peak: 71MB) Process took 0h:00m:01s realtime, 0h:00m:01s cputime Process completed successfully. # Sat Sep 16 03:39:52 2017 ###########################################################] Pre-mapping Report Synopsys Lattice Technology Pre-mapping, Version maplat, Build 1498R, Built Jul 5 2016 10:30:31 Copyright (C) 1994-2016 Synopsys, Inc. All rights reserved. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited. Product Version L-2016.03L-1 Mapper Startup Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 99MB peak: 99MB) @A:MF827 : | No constraint file specified. Linked File: proyecto_global_proyecto_global_scck.rpt Printing clock summary report in "C:\TFG\exp6\proyecto_global\proyecto_global_proyecto_global_scck.rpt" file @N:MF248 : | Running in 64-bit mode. @N:MF666 : | Clock conversion enabled. (Command "set_option -fix_gated_and_generated_clocks 1" in the project file.) Design Input Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 103MB peak: 105MB) Mapper Initialization Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 103MB peak: 105MB) Start loading timing files (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 114MB peak: 115MB) Finished loading timing files (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 114MB peak: 117MB) ICG Latch Removal Summary: Number of ICG latches removed: 0 Number of ICG latches not removed: 0 syn_allowed_resources : blockrams=7 set on top level netlist esquema_global Finished netlist restructuring (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 144MB peak: 145MB) Clock Summary ***************** Start Requested Requested Clock Clock Clock Clock Frequency Period Type Group Load ------------------------------------------------------------------------------------------------------------------------------------------------------ System 1.0 MHz 1000.000 system system_clkgroup 0 div2|tdataout0_derived_clock 1.0 MHz 1000.000 derived (from esquema_global|clk_ext_sal) Inferred_clkgroup_1 234 divfrec1|tdataout20_derived_clock 2.1 MHz 480.769 derived (from esquema_global|N_45_inferred_clock) Inferred_clkgroup_0 12 esquema_global|N_44_inferred_clock 1.0 MHz 1000.000 inferred Inferred_clkgroup_2 21 esquema_global|N_45_inferred_clock 2.1 MHz 480.769 inferred Inferred_clkgroup_0 21 esquema_global|clk_ext_sal 1.0 MHz 1000.000 inferred Inferred_clkgroup_1 7 pll1|CLKOS3_inferred_clock 1.0 MHz 1000.000 inferred Inferred_clkgroup_3 12 ====================================================================================================================================================== @W:MT529 : divfrec1.vhd(336) | Found inferred clock esquema_global|N_45_inferred_clock which controls 21 sequential elements including I7.FF_20. This clock has no specified timing constraint which may prevent conversion of gated or generated clocks and may adversely impact design performance. @W:MT529 : cont_50mhz_1mhz.vhd(143) | Found inferred clock esquema_global|clk_ext_sal which controls 7 sequential elements including I52.FF_5. This clock has no specified timing constraint which may prevent conversion of gated or generated clocks and may adversely impact design performance. @W:MT529 : control_disp.vhd(22) | Found inferred clock esquema_global|N_44_inferred_clock which controls 21 sequential elements including I69.cnt[20:0]. This clock has no specified timing constraint which may prevent conversion of gated or generated clocks and may adversely impact design performance. @W:MT529 : cont_bcd.vhd(116) | Found inferred clock pll1|CLKOS3_inferred_clock which controls 12 sequential elements including I8.FF_3. This clock has no specified timing constraint which may prevent conversion of gated or generated clocks and may adversely impact design performance. Finished Pre Mapping Phase. Starting constraint checker (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 143MB peak: 145MB) Encoding state machine selected[2:0] (in view: work.arbiter2_32s_32s_8s_8s(verilog)) original code -> new code 00 -> 00 01 -> 01 10 -> 10 None None Finished constraint checker (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 143MB peak: 145MB) Pre-mapping successful! At Mapper Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 59MB peak: 145MB) Process took 0h:00m:01s realtime, 0h:00m:01s cputime # Sat Sep 16 03:39:53 2017 ###########################################################] Map & Optimize Report Synopsys Lattice Technology Mapper, Version maplat, Build 1498R, Built Jul 5 2016 10:30:31 Copyright (C) 1994-2016 Synopsys, Inc. All rights reserved. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited. Product Version L-2016.03L-1 Mapper Startup Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 99MB peak: 100MB) @N:MF248 : | Running in 64-bit mode. @N:MF666 : | Clock conversion enabled. (Command "set_option -fix_gated_and_generated_clocks 1" in the project file.) Design Input Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 99MB peak: 101MB) Mapper Initialization Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 99MB peak: 101MB) Start loading timing files (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 111MB peak: 111MB) Finished loading timing files (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 111MB peak: 114MB) Starting Optimization and Mapping (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 141MB peak: 144MB) @N:MO111 : gpio.v(124) | Tristate driver PIO_BOTH_OUT_1 (in view: work.gpio_Z7_layer2(verilog)) on net PIO_BOTH_OUT_1 (in view: work.gpio_Z7_layer2(verilog)) has its enable tied to GND. @N:MO111 : gpio.v(123) | Tristate driver PIO_OUT_1 (in view: work.gpio_Z7_layer2(verilog)) on net PIO_OUT_1 (in view: work.gpio_Z7_layer2(verilog)) has its enable tied to GND. @N:MO111 : gpio.v(123) | Tristate driver PIO_OUT_2 (in view: work.gpio_Z7_layer2(verilog)) on net PIO_OUT_2 (in view: work.gpio_Z7_layer2(verilog)) has its enable tied to GND. @N:MO111 : gpio.v(123) | Tristate driver PIO_OUT_3 (in view: work.gpio_Z7_layer2(verilog)) on net PIO_OUT_3 (in view: work.gpio_Z7_layer2(verilog)) has its enable tied to GND. @N:MO111 : gpio.v(123) | Tristate driver PIO_OUT_4 (in view: work.gpio_Z7_layer2(verilog)) on net PIO_OUT_4 (in view: work.gpio_Z7_layer2(verilog)) has its enable tied to GND. @N:MO111 : gpio.v(123) | Tristate driver PIO_OUT_5 (in view: work.gpio_Z7_layer2(verilog)) on net PIO_OUT_5 (in view: work.gpio_Z7_layer2(verilog)) has its enable tied to GND. @N:MO111 : gpio.v(123) | Tristate driver PIO_OUT_6 (in view: work.gpio_Z7_layer2(verilog)) on net PIO_OUT_6 (in view: work.gpio_Z7_layer2(verilog)) has its enable tied to GND. @N:MO111 : gpio.v(123) | Tristate driver PIO_OUT_7 (in view: work.gpio_Z7_layer2(verilog)) on net PIO_OUT_7 (in view: work.gpio_Z7_layer2(verilog)) has its enable tied to GND. @N:MO111 : gpio.v(123) | Tristate driver PIO_OUT_8 (in view: work.gpio_Z7_layer2(verilog)) on net PIO_OUT_8 (in view: work.gpio_Z7_layer2(verilog)) has its enable tied to GND. @N:MO111 : gpio.v(123) | Tristate driver PIO_OUT_9 (in view: work.gpio_Z7_layer2(verilog)) on net PIO_OUT_9 (in view: work.gpio_Z7_layer2(verilog)) has its enable tied to GND. @N:BN362 : tpio.v(126) | Removing sequential instance genblk9\.genblk1\.jtio_inst\[11\]\.TP.PIO_DATA_I (in view: work.gpio_Z7_layer2(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(126) | Removing sequential instance genblk9\.genblk1\.jtio_inst\[10\]\.TP.PIO_DATA_I (in view: work.gpio_Z7_layer2(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(126) | Removing sequential instance genblk9\.genblk1\.jtio_inst\[9\]\.TP.PIO_DATA_I (in view: work.gpio_Z7_layer2(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(126) | Removing sequential instance genblk9\.genblk1\.jtio_inst\[8\]\.TP.PIO_DATA_I (in view: work.gpio_Z7_layer2(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(126) | Removing sequential instance genblk9\.itio_inst\[3\]\.TP.PIO_DATA_I (in view: work.gpio_Z7_layer2(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(126) | Removing sequential instance genblk9\.itio_inst\[6\]\.TP.PIO_DATA_I (in view: work.gpio_Z7_layer2(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(126) | Removing sequential instance genblk9\.itio_inst\[2\]\.TP.PIO_DATA_I (in view: work.gpio_Z7_layer2(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(126) | Removing sequential instance genblk9\.itio_inst\[5\]\.TP.PIO_DATA_I (in view: work.gpio_Z7_layer2(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(126) | Removing sequential instance genblk9\.itio_inst\[1\]\.TP.PIO_DATA_I (in view: work.gpio_Z7_layer2(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(126) | Removing sequential instance genblk9\.itio_inst\[4\]\.TP.PIO_DATA_I (in view: work.gpio_Z7_layer2(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(126) | Removing sequential instance genblk9\.itio_inst\[7\]\.TP.PIO_DATA_I (in view: work.gpio_Z7_layer2(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(126) | Removing sequential instance genblk9\.itio_inst\[0\]\.TP.PIO_DATA_I (in view: work.gpio_Z7_layer2(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(126) | Removing sequential instance genblk9\.genblk1\.jtio_inst\[11\]\.TP.PIO_DATA_I (in view: work.gpio_Z8_layer2(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(126) | Removing sequential instance genblk9\.genblk1\.jtio_inst\[10\]\.TP.PIO_DATA_I (in view: work.gpio_Z8_layer2(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(126) | Removing sequential instance genblk9\.genblk1\.jtio_inst\[9\]\.TP.PIO_DATA_I (in view: work.gpio_Z8_layer2(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(126) | Removing sequential instance genblk9\.genblk1\.jtio_inst\[8\]\.TP.PIO_DATA_I (in view: work.gpio_Z8_layer2(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(126) | Removing sequential instance genblk9\.itio_inst\[3\]\.TP.PIO_DATA_I (in view: work.gpio_Z8_layer2(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(126) | Removing sequential instance genblk9\.itio_inst\[6\]\.TP.PIO_DATA_I (in view: work.gpio_Z8_layer2(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(126) | Removing sequential instance genblk9\.itio_inst\[2\]\.TP.PIO_DATA_I (in view: work.gpio_Z8_layer2(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(126) | Removing sequential instance genblk9\.itio_inst\[5\]\.TP.PIO_DATA_I (in view: work.gpio_Z8_layer2(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(126) | Removing sequential instance genblk9\.itio_inst\[1\]\.TP.PIO_DATA_I (in view: work.gpio_Z8_layer2(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(126) | Removing sequential instance genblk9\.itio_inst\[4\]\.TP.PIO_DATA_I (in view: work.gpio_Z8_layer2(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(126) | Removing sequential instance genblk9\.itio_inst\[7\]\.TP.PIO_DATA_I (in view: work.gpio_Z8_layer2(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(126) | Removing sequential instance genblk9\.itio_inst\[0\]\.TP.PIO_DATA_I (in view: work.gpio_Z8_layer2(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(126) | Removing sequential instance genblk9\.itio_inst\[3\]\.TP.PIO_DATA_I (in view: work.gpio_Z9_layer2(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(126) | Removing sequential instance genblk9\.itio_inst\[2\]\.TP.PIO_DATA_I (in view: work.gpio_Z9_layer2(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(126) | Removing sequential instance genblk9\.itio_inst\[1\]\.TP.PIO_DATA_I (in view: work.gpio_Z9_layer2(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(126) | Removing sequential instance genblk9\.itio_inst\[0\]\.TP.PIO_DATA_I (in view: work.gpio_Z9_layer2(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(120) | Removing sequential instance gpiocont.genblk9\.itio_inst\[3\]\.TP.PIO_DATA_O (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(114) | Removing sequential instance gpiocont.genblk9\.itio_inst\[3\]\.TP.PIO_TRI (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(120) | Removing sequential instance gpiocont.genblk9\.itio_inst\[2\]\.TP.PIO_DATA_O (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(114) | Removing sequential instance gpiocont.genblk9\.itio_inst\[2\]\.TP.PIO_TRI (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(120) | Removing sequential instance gpiocont.genblk9\.itio_inst\[1\]\.TP.PIO_DATA_O (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(114) | Removing sequential instance gpiocont.genblk9\.itio_inst\[1\]\.TP.PIO_TRI (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(120) | Removing sequential instance gpiocont.genblk9\.itio_inst\[0\]\.TP.PIO_DATA_O (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(114) | Removing sequential instance gpiocont.genblk9\.itio_inst\[0\]\.TP.PIO_TRI (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(120) | Removing sequential instance gpiosal.genblk9\.genblk1\.jtio_inst\[11\]\.TP.PIO_DATA_O (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(114) | Removing sequential instance gpiosal.genblk9\.genblk1\.jtio_inst\[11\]\.TP.PIO_TRI (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(120) | Removing sequential instance gpiosal.genblk9\.genblk1\.jtio_inst\[10\]\.TP.PIO_DATA_O (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(114) | Removing sequential instance gpiosal.genblk9\.genblk1\.jtio_inst\[10\]\.TP.PIO_TRI (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(120) | Removing sequential instance gpiosal.genblk9\.genblk1\.jtio_inst\[9\]\.TP.PIO_DATA_O (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(114) | Removing sequential instance gpiosal.genblk9\.genblk1\.jtio_inst\[9\]\.TP.PIO_TRI (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(120) | Removing sequential instance gpiosal.genblk9\.genblk1\.jtio_inst\[8\]\.TP.PIO_DATA_O (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(114) | Removing sequential instance gpiosal.genblk9\.genblk1\.jtio_inst\[8\]\.TP.PIO_TRI (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(120) | Removing sequential instance gpiosal.genblk9\.itio_inst\[3\]\.TP.PIO_DATA_O (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(114) | Removing sequential instance gpiosal.genblk9\.itio_inst\[3\]\.TP.PIO_TRI (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(120) | Removing sequential instance gpiosal.genblk9\.itio_inst\[6\]\.TP.PIO_DATA_O (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(114) | Removing sequential instance gpiosal.genblk9\.itio_inst\[6\]\.TP.PIO_TRI (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(120) | Removing sequential instance gpiosal.genblk9\.itio_inst\[2\]\.TP.PIO_DATA_O (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(114) | Removing sequential instance gpiosal.genblk9\.itio_inst\[2\]\.TP.PIO_TRI (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(120) | Removing sequential instance gpiosal.genblk9\.itio_inst\[5\]\.TP.PIO_DATA_O (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(114) | Removing sequential instance gpiosal.genblk9\.itio_inst\[5\]\.TP.PIO_TRI (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(120) | Removing sequential instance gpiosal.genblk9\.itio_inst\[1\]\.TP.PIO_DATA_O (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(114) | Removing sequential instance gpiosal.genblk9\.itio_inst\[1\]\.TP.PIO_TRI (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(120) | Removing sequential instance gpiosal.genblk9\.itio_inst\[4\]\.TP.PIO_DATA_O (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(114) | Removing sequential instance gpiosal.genblk9\.itio_inst\[4\]\.TP.PIO_TRI (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(120) | Removing sequential instance gpiosal.genblk9\.itio_inst\[7\]\.TP.PIO_DATA_O (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(114) | Removing sequential instance gpiosal.genblk9\.itio_inst\[7\]\.TP.PIO_TRI (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(120) | Removing sequential instance gpiosal.genblk9\.itio_inst\[0\]\.TP.PIO_DATA_O (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(114) | Removing sequential instance gpiosal.genblk9\.itio_inst\[0\]\.TP.PIO_TRI (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(120) | Removing sequential instance gpioent.genblk9\.genblk1\.jtio_inst\[11\]\.TP.PIO_DATA_O (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(114) | Removing sequential instance gpioent.genblk9\.genblk1\.jtio_inst\[11\]\.TP.PIO_TRI (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(120) | Removing sequential instance gpioent.genblk9\.genblk1\.jtio_inst\[10\]\.TP.PIO_DATA_O (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(114) | Removing sequential instance gpioent.genblk9\.genblk1\.jtio_inst\[10\]\.TP.PIO_TRI (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(120) | Removing sequential instance gpioent.genblk9\.genblk1\.jtio_inst\[9\]\.TP.PIO_DATA_O (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(114) | Removing sequential instance gpioent.genblk9\.genblk1\.jtio_inst\[9\]\.TP.PIO_TRI (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(120) | Removing sequential instance gpioent.genblk9\.genblk1\.jtio_inst\[8\]\.TP.PIO_DATA_O (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(114) | Removing sequential instance gpioent.genblk9\.genblk1\.jtio_inst\[8\]\.TP.PIO_TRI (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(120) | Removing sequential instance gpioent.genblk9\.itio_inst\[3\]\.TP.PIO_DATA_O (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(114) | Removing sequential instance gpioent.genblk9\.itio_inst\[3\]\.TP.PIO_TRI (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(120) | Removing sequential instance gpioent.genblk9\.itio_inst\[6\]\.TP.PIO_DATA_O (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(114) | Removing sequential instance gpioent.genblk9\.itio_inst\[6\]\.TP.PIO_TRI (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(120) | Removing sequential instance gpioent.genblk9\.itio_inst\[2\]\.TP.PIO_DATA_O (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(114) | Removing sequential instance gpioent.genblk9\.itio_inst\[2\]\.TP.PIO_TRI (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(120) | Removing sequential instance gpioent.genblk9\.itio_inst\[5\]\.TP.PIO_DATA_O (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(114) | Removing sequential instance gpioent.genblk9\.itio_inst\[5\]\.TP.PIO_TRI (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(120) | Removing sequential instance gpioent.genblk9\.itio_inst\[1\]\.TP.PIO_DATA_O (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(114) | Removing sequential instance gpioent.genblk9\.itio_inst\[1\]\.TP.PIO_TRI (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(120) | Removing sequential instance gpioent.genblk9\.itio_inst\[4\]\.TP.PIO_DATA_O (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(114) | Removing sequential instance gpioent.genblk9\.itio_inst\[4\]\.TP.PIO_TRI (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(120) | Removing sequential instance gpioent.genblk9\.itio_inst\[7\]\.TP.PIO_DATA_O (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(114) | Removing sequential instance gpioent.genblk9\.itio_inst\[7\]\.TP.PIO_TRI (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(120) | Removing sequential instance gpioent.genblk9\.itio_inst\[0\]\.TP.PIO_DATA_O (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : tpio.v(114) | Removing sequential instance gpioent.genblk9\.itio_inst\[0\]\.TP.PIO_TRI (in view: work.dos_gpio(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. Available hyper_sources - for debug and ip models None Found @W:FA239 : decodif.vhd(25) | ROM I35.SEGMENTOS_1[6:0] (in view: work.esquema_global(verilog)) mapped in logic. To map to a technology ROM, apply attribute syn_romstyle on this instance. @W:FA239 : decodif.vhd(25) | ROM I23.SEGMENTOS_1[6:0] (in view: work.esquema_global(verilog)) mapped in logic. To map to a technology ROM, apply attribute syn_romstyle on this instance. @W:FA239 : decodif.vhd(25) | ROM I35.SEGMENTOS_1[6:0] (in view: work.esquema_global(verilog)) mapped in logic. To map to a technology ROM, apply attribute syn_romstyle on this instance. @N:MO106 : decodif.vhd(25) | Found ROM .delname. (in view: work.esquema_global(verilog)) with 10 words by 7 bits. @W:FA239 : decodif.vhd(25) | ROM I23.SEGMENTOS_1[6:0] (in view: work.esquema_global(verilog)) mapped in logic. To map to a technology ROM, apply attribute syn_romstyle on this instance. @N:MO106 : decodif.vhd(25) | Found ROM .delname. (in view: work.esquema_global(verilog)) with 10 words by 7 bits. Finished RTL optimizations (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 142MB peak: 144MB) Encoding state machine selected[2:0] (in view: work.arbiter2_32s_32s_8s_8s(verilog)) original code -> new code 00 -> 00 01 -> 01 10 -> 10 @W:MO160 : dos_gpio.v(246) | Register bit selected[0] (in view view:work.arbiter2_32s_32s_8s_8s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. Starting factoring (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 143MB peak: 144MB) @W:BN132 : lm8_flow_cntl.v(507) | Removing instance I82.lm8_inst.LM8.u1_isp8_core.u1_lm8_flow_cntl.dout_alu_reg[0] because it is equivalent to instance I82.lm8_inst.LM8.u1_isp8_core.din_rd1[0]. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:BN132 : lm8_flow_cntl.v(507) | Removing instance I82.lm8_inst.LM8.u1_isp8_core.u1_lm8_flow_cntl.dout_alu_reg[1] because it is equivalent to instance I82.lm8_inst.LM8.u1_isp8_core.din_rd1[1]. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:BN132 : lm8_flow_cntl.v(507) | Removing instance I82.lm8_inst.LM8.u1_isp8_core.u1_lm8_flow_cntl.dout_alu_reg[2] because it is equivalent to instance I82.lm8_inst.LM8.u1_isp8_core.din_rd1[2]. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:BN132 : lm8_flow_cntl.v(507) | Removing instance I82.lm8_inst.LM8.u1_isp8_core.u1_lm8_flow_cntl.dout_alu_reg[3] because it is equivalent to instance I82.lm8_inst.LM8.u1_isp8_core.din_rd1[3]. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:BN132 : lm8_flow_cntl.v(507) | Removing instance I82.lm8_inst.LM8.u1_isp8_core.u1_lm8_flow_cntl.dout_alu_reg[4] because it is equivalent to instance I82.lm8_inst.LM8.u1_isp8_core.din_rd1[4]. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:BN132 : lm8_flow_cntl.v(507) | Removing instance I82.lm8_inst.LM8.u1_isp8_core.u1_lm8_flow_cntl.dout_alu_reg[5] because it is equivalent to instance I82.lm8_inst.LM8.u1_isp8_core.din_rd1[5]. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:BN132 : lm8_flow_cntl.v(507) | Removing instance I82.lm8_inst.LM8.u1_isp8_core.u1_lm8_flow_cntl.dout_alu_reg[6] because it is equivalent to instance I82.lm8_inst.LM8.u1_isp8_core.din_rd1[6]. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:BN132 : lm8_flow_cntl.v(507) | Removing instance I82.lm8_inst.LM8.u1_isp8_core.u1_lm8_flow_cntl.dout_alu_reg[7] because it is equivalent to instance I82.lm8_inst.LM8.u1_isp8_core.din_rd1[7]. To keep the instance, apply constraint syn_preserve=1 on the instance. Finished factoring (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 150MB peak: 150MB) Finished gated-clock and generated-clock conversion (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 146MB peak: 150MB) Finished generic timing optimizations - Pass 1 (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 149MB peak: 150MB) @N:FA113 : lm8_flow_cntl.v(410) | Pipelining module un1_stack_ptr[3:0]. For more information, search for "pipelining" in Online Help. @N:MF169 : lm8_flow_cntl.v(507) | Pushed in register stack_ptr[3:0]. @N:BN362 : lm8_interrupt.v(122) | Removing sequential instance I82.lm8_inst.LM8.u1_isp8_core.u1_lm8_interrupt.ip[2] (in view: work.esquema_global(verilog)) because it does not drive other instances. @N:BN362 : lm8_interrupt.v(122) | Removing sequential instance I82.lm8_inst.LM8.u1_isp8_core.u1_lm8_interrupt.ip[1] (in view: work.esquema_global(verilog)) because it does not drive other instances. @N:BN362 : lm8_interrupt.v(122) | Removing sequential instance I82.lm8_inst.LM8.u1_isp8_core.u1_lm8_interrupt.ip[0] (in view: work.esquema_global(verilog)) because it does not drive other instances. @N:BN362 : lm8_interrupt.v(122) | Removing sequential instance I82.lm8_inst.LM8.u1_isp8_core.u1_lm8_interrupt.ip[7] (in view: work.esquema_global(verilog)) because it does not drive other instances. @N:BN362 : lm8_interrupt.v(122) | Removing sequential instance I82.lm8_inst.LM8.u1_isp8_core.u1_lm8_interrupt.ip[6] (in view: work.esquema_global(verilog)) because it does not drive other instances. @N:BN362 : lm8_interrupt.v(122) | Removing sequential instance I82.lm8_inst.LM8.u1_isp8_core.u1_lm8_interrupt.ip[5] (in view: work.esquema_global(verilog)) because it does not drive other instances. @N:BN362 : lm8_interrupt.v(122) | Removing sequential instance I82.lm8_inst.LM8.u1_isp8_core.u1_lm8_interrupt.ip[4] (in view: work.esquema_global(verilog)) because it does not drive other instances. @N:BN362 : lm8_interrupt.v(122) | Removing sequential instance I82.lm8_inst.LM8.u1_isp8_core.u1_lm8_interrupt.ip[3] (in view: work.esquema_global(verilog)) because it does not drive other instances. @N:BN362 : lm8_flow_cntl.v(507) | Removing sequential instance I82.lm8_inst.LM8.u1_isp8_core.u1_lm8_flow_cntl.intr_ack (in view: work.esquema_global(verilog)) because it does not drive other instances. Starting Early Timing Optimization (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 149MB peak: 150MB) Finished Early Timing Optimization (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 149MB peak: 150MB) Finished generic timing optimizations - Pass 2 (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 149MB peak: 150MB) Finished preparing to map (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 149MB peak: 150MB) Finished technology mapping (Real Time elapsed 0h:00m:02s; CPU Time elapsed 0h:00m:02s; Memory used current: 179MB peak: 181MB) Pass CPU time Worst Slack Luts / Registers ------------------------------------------------------------ 1 0h:00m:02s 475.80ns 325 / 153 Finished technology timing optimizations and critical path resynthesis (Real Time elapsed 0h:00m:02s; CPU Time elapsed 0h:00m:02s; Memory used current: 179MB peak: 181MB) @N:FX164 : | The option to pack registers in the IOB has not been specified. Please set syn_useioff attribute. Finished restoring hierarchy (Real Time elapsed 0h:00m:02s; CPU Time elapsed 0h:00m:02s; Memory used current: 179MB peak: 181MB) @S |Clock Optimization Summary #### START OF CLOCK OPTIMIZATION REPORT #####[ 3 non-gated/non-generated clock tree(s) driving 151 clock pin(s) of sequential element(s) 3 gated/generated clock tree(s) driving 54 clock pin(s) of sequential element(s) 0 instances converted, 54 sequential instances remain driven by gated/generated clocks ================================================ Non-Gated/Non-Generated Clocks ================================================ Clock Tree ID Driving Element Drive Element Type Fanout Sample Instance -------------------------------------------------------------------------------------------------------------------------------- ClockId0004 clk_ext_sal port 7 I84.FF_0 ClockId0005 I84.FF_0 FD1P3DX 132 I82.lm8_inst.LM8.u1_isp8_core.u1_lm8_flow_cntl.rst_n_reg ClockId0006 I7.FF_0 FD1P3DX 12 I70 ================================================================================================================================ ================================================================ Gated/Generated Clocks ================================================================= Clock Tree ID Driving Element Drive Element Type Fanout Sample Instance Explanation --------------------------------------------------------------------------------------------------------------------------------------------------------- ClockId0001 I5 OSCH 21 I7.FF_0 No gated clock conversion method for cell cell:LUCENT.FD1P3DX ClockId0002 I51 AND3 21 I69.cnt[20] No gated clock conversion method for cell cell:LUCENT.FD1S3DX ClockId0003 I53.PLLInst_0 EHXPLLJ 12 I27.FF_0 No gated clock conversion method for cell cell:LUCENT.FD1P3DX ========================================================================================================================================================= ##### END OF CLOCK OPTIMIZATION REPORT ######] Start Writing Netlists (Real Time elapsed 0h:00m:02s; CPU Time elapsed 0h:00m:02s; Memory used current: 145MB peak: 181MB) Writing Analyst data base C:\TFG\exp6\proyecto_global\synwork\proyecto_global_proyecto_global_m.srm Finished Writing Netlist Databases (Real Time elapsed 0h:00m:03s; CPU Time elapsed 0h:00m:03s; Memory used current: 177MB peak: 181MB) Writing EDIF Netlist and constraint files @N:FX1056 : | Writing EDF file: C:\TFG\exp6\proyecto_global\proyecto_global_proyecto_global.edi L-2016.03L-1 @N:BW106 : | Synplicity Constraint File capacitance units using default value of 1pF Finished Writing EDIF Netlist and constraint files (Real Time elapsed 0h:00m:03s; CPU Time elapsed 0h:00m:03s; Memory used current: 182MB peak: 184MB) Start final timing analysis (Real Time elapsed 0h:00m:04s; CPU Time elapsed 0h:00m:03s; Memory used current: 181MB peak: 184MB) @W:MT246 : esquema_global.v(109) | Blackbox AND4 is missing a user supplied timing model. This may have a negative effect on timing analysis and optimizations (Quality of Results) @W:MT246 : esquema_global.v(96) | Blackbox AND3 is missing a user supplied timing model. This may have a negative effect on timing analysis and optimizations (Quality of Results) @W:MT246 : lm8_top.v(607) | Blackbox pmi_ram_dq_Z6_layer2 is missing a user supplied timing model. This may have a negative effect on timing analysis and optimizations (Quality of Results) @W:MT246 : lm8_top.v(377) | Blackbox pmi_ram_dq_Z5_layer2 is missing a user supplied timing model. This may have a negative effect on timing analysis and optimizations (Quality of Results) @W:MT246 : lm8_core.v(534) | Blackbox pmi_distributed_dpram_32s_5s_8s_noreg_none_binary_EC_pmi_distributed_dpram_3_layer2 is missing a user supplied timing model. This may have a negative effect on timing analysis and optimizations (Quality of Results) @W:MT246 : lm8_flow_cntl.v(456) | Blackbox pmi_distributed_spram_16s_4s_13s_noreg_none_binary_EC_pmi_distributed_spram_1_layer2 is missing a user supplied timing model. This may have a negative effect on timing analysis and optimizations (Quality of Results) @W:MT246 : lm8_alu.v(102) | Blackbox pmi_addsub_8s_8s_off_EC_pmi_addsub is missing a user supplied timing model. This may have a negative effect on timing analysis and optimizations (Quality of Results) @W:MT246 : pll1.vhd(108) | Blackbox EHXPLLJ is missing a user supplied timing model. This may have a negative effect on timing analysis and optimizations (Quality of Results) @W:MT420 : | Found inferred clock esquema_global|clk_ext_sal with period 1000.00ns. Please declare a user-defined clock on object "p:clk_ext_sal" @W:MT420 : | Found inferred clock esquema_global|N_44_inferred_clock with period 1000.00ns. Please declare a user-defined clock on object "n:N_44" @W:MT420 : | Found inferred clock esquema_global|N_45_inferred_clock with period 480.77ns. Please declare a user-defined clock on object "n:N_45" @N:MT615 : | Found clock div2|tdataout0_derived_clock with period 1000.00ns @W:MT420 : | Found inferred clock pll1|CLKOS3_inferred_clock with period 1000.00ns. Please declare a user-defined clock on object "n:I53.CLKOS3" @N:MT615 : | Found clock divfrec1|tdataout20_derived_clock with period 480.77ns ##### START OF TIMING REPORT #####[ # Timing Report written on Sat Sep 16 03:39:58 2017 # Top view: esquema_global Requested Frequency: 1.0 MHz Wire load mode: top Paths requested: 5 Constraint File(s): @N:MT320 : | Timing report estimates place and route data. Please look at the place and route timing report for final timing. @N:MT322 : | Clock constraints cover only FF-to-FF paths associated with the clock. Performance Summary ******************* Worst slack in design: 475.795 Requested Estimated Requested Estimated Clock Clock Starting Clock Frequency Frequency Period Period Slack Type Group ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- div2|tdataout0_derived_clock 1.0 MHz 112.5 MHz 1000.000 8.886 1982.227 derived (from esquema_global|clk_ext_sal) Inferred_clkgroup_1 divfrec1|tdataout20_derived_clock 2.1 MHz NA 480.769 NA NA derived (from esquema_global|N_45_inferred_clock) Inferred_clkgroup_0 esquema_global|N_44_inferred_clock 1.0 MHz 165.2 MHz 1000.000 6.055 993.946 inferred Inferred_clkgroup_2 esquema_global|N_45_inferred_clock 2.1 MHz 201.0 MHz 480.769 4.974 475.795 inferred Inferred_clkgroup_0 esquema_global|clk_ext_sal 1.0 MHz 259.0 MHz 1000.000 3.861 996.139 inferred Inferred_clkgroup_1 pll1|CLKOS3_inferred_clock 1.0 MHz 343.8 MHz 1000.000 2.909 997.091 inferred Inferred_clkgroup_3 System 1.0 MHz 61.4 MHz 1000.000 16.293 983.707 system system_clkgroup ===================================================================================================================================================================================== @N:MT582 : | Estimated period and frequency not reported for given clock unless the clock has at least one timing path which is not a false or a max delay path and that does not have excessive slack Clock Relationships ******************* Clocks | rise to rise | fall to fall | rise to fall | fall to rise ----------------------------------------------------------------------------------------------------------------------------------------------------------------- Starting Ending | constraint slack | constraint slack | constraint slack | constraint slack ----------------------------------------------------------------------------------------------------------------------------------------------------------------- System System | 1000.000 983.707 | No paths - | No paths - | No paths - System esquema_global|N_45_inferred_clock | 480.769 480.664 | No paths - | No paths - | No paths - System esquema_global|clk_ext_sal | 1000.000 999.894 | No paths - | No paths - | No paths - System pll1|CLKOS3_inferred_clock | 1000.000 999.528 | No paths - | No paths - | No paths - System div2|tdataout0_derived_clock | 1000.000 983.602 | No paths - | No paths - | No paths - esquema_global|N_45_inferred_clock System | 480.769 475.795 | No paths - | No paths - | No paths - esquema_global|clk_ext_sal System | 1000.000 996.139 | No paths - | No paths - | No paths - esquema_global|N_44_inferred_clock esquema_global|N_44_inferred_clock | 1000.000 993.946 | No paths - | No paths - | No paths - pll1|CLKOS3_inferred_clock System | 1000.000 997.091 | No paths - | No paths - | No paths - pll1|CLKOS3_inferred_clock divfrec1|tdataout20_derived_clock | Diff grp - | No paths - | No paths - | No paths - div2|tdataout0_derived_clock System | 1000.000 982.333 | No paths - | No paths - | No paths - div2|tdataout0_derived_clock div2|tdataout0_derived_clock | 1000.000 1982.227 | No paths - | No paths - | No paths - divfrec1|tdataout20_derived_clock div2|tdataout0_derived_clock | Diff grp - | No paths - | No paths - | No paths - ================================================================================================================================================================= Note: 'No paths' indicates there are no paths in the design for that pair of clock edges. 'Diff grp' indicates that paths exist but the starting clock and ending clock are in different clock groups. Interface Information ********************* No IO constraint found ==================================== Detailed Report for Clock: div2|tdataout0_derived_clock ==================================== Starting Points with Worst Slack ******************************** Starting Arrival Instance Reference Type Pin Net Time Slack Clock ----------------------------------------------------------------------------------------------------------------------------------------------------- I82.lm8_inst.LM8.genblk1\.first_fetch div2|tdataout0_derived_clock FD1S3DX Q first_fetch 1.374 982.333 I82.lm8_inst.LM8.u1_isp8_core.genblk2\.page_ptr1[3] div2|tdataout0_derived_clock FD1P3DX Q page_ptr1[3] 1.044 986.410 I82.lm8_inst.LM8.u1_isp8_core.genblk2\.page_ptr1[6] div2|tdataout0_derived_clock FD1P3DX Q page_ptr1[6] 1.044 986.410 I82.lm8_inst.LM8.u1_isp8_core.genblk2\.page_ptr1[7] div2|tdataout0_derived_clock FD1P3DX Q page_ptr1[7] 1.044 986.410 I82.lm8_inst.LM8.u1_isp8_core.genblk2\.page_ptr1[4] div2|tdataout0_derived_clock FD1P3DX Q page_ptr1[4] 1.044 987.427 I82.lm8_inst.LM8.u1_isp8_core.genblk2\.page_ptr1[5] div2|tdataout0_derived_clock FD1P3DX Q page_ptr1[5] 1.044 987.427 I82.lm8_inst.LM8.u1_isp8_core.u1_lm8_cntl_u1.ext_io_wr div2|tdataout0_derived_clock FD1S3DX Q ext_io_wr 1.044 987.555 I82.lm8_inst.LM8.u1_isp8_core.u1_lm8_cntl_u1.ext_mem_wr div2|tdataout0_derived_clock FD1S3DX Q ext_mem_wr 1.148 987.587 I82.lm8_inst.LM8.u1_isp8_core.u1_lm8_cntl_u1.ext_io_rd div2|tdataout0_derived_clock FD1S3DX Q ext_io_rd 0.972 987.627 I82.lm8_inst.LM8.u1_isp8_core.u1_lm8_cntl_u1.ext_mem_rd div2|tdataout0_derived_clock FD1S3DX Q ext_mem_rd 1.044 987.691 ===================================================================================================================================================== Ending Points with Worst Slack ****************************** Starting Required Instance Reference Type Pin Net Time Slack Clock ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- I82.lm8_inst.LM8.u1_isp8_core.genblk6\.genblk1\.u1_lm8_rfmem div2|tdataout0_derived_clock pmi_distributed_dpram_32s_5s_8s_noreg_none_binary_EC_pmi_distributed_dpram_3_layer2 Data[0] din_rd[0] 1000.000 982.333 I82.lm8_inst.LM8.u1_isp8_core.genblk6\.genblk1\.u1_lm8_rfmem div2|tdataout0_derived_clock pmi_distributed_dpram_32s_5s_8s_noreg_none_binary_EC_pmi_distributed_dpram_3_layer2 Data[2] din_rd[2] 1000.000 982.333 I82.lm8_inst.LM8.u1_isp8_core.genblk6\.genblk1\.u2_lm8_rfmem div2|tdataout0_derived_clock pmi_distributed_dpram_32s_5s_8s_noreg_none_binary_EC_pmi_distributed_dpram_3_layer2 Data[0] din_rd[0] 1000.000 982.333 I82.lm8_inst.LM8.u1_isp8_core.genblk6\.genblk1\.u2_lm8_rfmem div2|tdataout0_derived_clock pmi_distributed_dpram_32s_5s_8s_noreg_none_binary_EC_pmi_distributed_dpram_3_layer2 Data[2] din_rd[2] 1000.000 982.333 I82.lm8_inst.LM8.u1_isp8_core.genblk6\.genblk1\.u1_lm8_rfmem div2|tdataout0_derived_clock pmi_distributed_dpram_32s_5s_8s_noreg_none_binary_EC_pmi_distributed_dpram_3_layer2 Data[1] din_rd[1] 1000.000 983.037 I82.lm8_inst.LM8.u1_isp8_core.genblk6\.genblk1\.u1_lm8_rfmem div2|tdataout0_derived_clock pmi_distributed_dpram_32s_5s_8s_noreg_none_binary_EC_pmi_distributed_dpram_3_layer2 Data[3] din_rd[3] 1000.000 983.037 I82.lm8_inst.LM8.u1_isp8_core.genblk6\.genblk1\.u2_lm8_rfmem div2|tdataout0_derived_clock pmi_distributed_dpram_32s_5s_8s_noreg_none_binary_EC_pmi_distributed_dpram_3_layer2 Data[1] din_rd[1] 1000.000 983.037 I82.lm8_inst.LM8.u1_isp8_core.genblk6\.genblk1\.u2_lm8_rfmem div2|tdataout0_derived_clock pmi_distributed_dpram_32s_5s_8s_noreg_none_binary_EC_pmi_distributed_dpram_3_layer2 Data[3] din_rd[3] 1000.000 983.037 I82.lm8_inst.LM8.u1_isp8_core.genblk6\.genblk1\.u1_lm8_rfmem div2|tdataout0_derived_clock pmi_distributed_dpram_32s_5s_8s_noreg_none_binary_EC_pmi_distributed_dpram_3_layer2 Data[4] din_rd[4] 1000.000 985.071 I82.lm8_inst.LM8.u1_isp8_core.genblk6\.genblk1\.u1_lm8_rfmem div2|tdataout0_derived_clock pmi_distributed_dpram_32s_5s_8s_noreg_none_binary_EC_pmi_distributed_dpram_3_layer2 Data[5] din_rd[5] 1000.000 985.071 ======================================================================================================================================================================================================================================== Worst Path Information View Worst Path in Analyst *********************** Path information for path number 1: Requested Period: 1000.000 - Setup time: 0.000 + Clock delay at ending point: 0.000 (ideal) + Estimated clock delay at ending point: 0.000 = Required time: 1000.000 - Propagation time: 17.667 - Clock delay at starting point: 0.000 (ideal) = Slack (non-critical) : 982.333 Number of logic level(s): 16 Starting point: I82.lm8_inst.LM8.genblk1\.first_fetch / Q Ending point: I82.lm8_inst.LM8.u1_isp8_core.genblk6\.genblk1\.u1_lm8_rfmem / Data[0] The start point is clocked by div2|tdataout0_derived_clock [rising] on pin CK The end point is clocked by System [rising] Instance / Net Pin Pin Arrival No. of Name Type Name Dir Delay Time Fan Out(s) ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- I82.lm8_inst.LM8.genblk1\.first_fetch FD1S3DX Q Out 1.374 1.374 - first_fetch Net - - - - 63 I82.lm8_inst.LM8.u1_isp8_core.u1_lm8_idec.instr_l2_3 ORCALUT4 A In 0.000 1.374 - I82.lm8_inst.LM8.u1_isp8_core.u1_lm8_idec.instr_l2_3 ORCALUT4 Z Out 1.193 2.567 - instr_l2_3 Net - - - - 4 I82.lm8_inst.LM8.u1_isp8_core.u1_lm8_idec.iels ORCALUT4 D In 0.000 2.567 - I82.lm8_inst.LM8.u1_isp8_core.u1_lm8_idec.iels ORCALUT4 Z Out 1.249 3.816 - iels Net - - - - 7 I82.lm8_inst.LM8.u1_isp8_core.genblk1\.ext_addr8 ORCALUT4 B In 0.000 3.816 - I82.lm8_inst.LM8.u1_isp8_core.genblk1\.ext_addr8 ORCALUT4 Z Out 1.305 5.121 - ext_addr8 Net - - - - 15 I82.lm8_inst.LM8.genblk3\.genblk1\.un12_external_sp_2 ORCALUT4 A In 0.000 5.121 - I82.lm8_inst.LM8.genblk3\.genblk1\.un12_external_sp_2 ORCALUT4 Z Out 1.017 6.137 - un12_external_sp_2 Net - - - - 1 I82.lm8_inst.LM8.genblk3\.genblk1\.un12_external_sp ORCALUT4 A In 0.000 6.137 - I82.lm8_inst.LM8.genblk3\.genblk1\.un12_external_sp ORCALUT4 Z Out 1.281 7.418 - un12_external_sp Net - - - - 11 I82.lm8_inst.LM8.ext_cyc ORCALUT4 D In 0.000 7.418 - I82.lm8_inst.LM8.ext_cyc ORCALUT4 Z Out 1.265 8.683 - ext_cyc Net - - - - 8 I82.lm8_inst.LM8.genblk2\.D_CYC_O4 ORCALUT4 A In 0.000 8.683 - I82.lm8_inst.LM8.genblk2\.D_CYC_O4 ORCALUT4 Z Out 0.449 9.132 - LM8D_STB_O Net - - - - 5 I82.lm8_inst.gpioent.genblk2\.un5_PIO_DATA_RE_EN ORCALUT4 C In 0.000 9.132 - I82.lm8_inst.gpioent.genblk2\.un5_PIO_DATA_RE_EN ORCALUT4 Z Out 1.193 10.325 - un5_PIO_DATA_RE_EN Net - - - - 4 I82.lm8_inst.gpiocont.read_addr_0_RNO ORCALUT4 B In 0.000 10.325 - I82.lm8_inst.gpiocont.read_addr_0_RNO ORCALUT4 Z Out 1.017 11.341 - read_addr_0_1 Net - - - - 1 I82.lm8_inst.gpiocont.read_addr_0 ORCALUT4 A In 0.000 11.341 - I82.lm8_inst.gpiocont.read_addr_0 ORCALUT4 Z Out 1.225 12.566 - N_465 Net - - - - 5 I82.lm8_inst.arbiter.WBM1_DAT_I_0_iv_RNO_0[0] ORCALUT4 A In 0.000 12.566 - I82.lm8_inst.arbiter.WBM1_DAT_I_0_iv_RNO_0[0] ORCALUT4 Z Out 1.017 13.583 - gpiocontGPIO_DAT_O_m[24] Net - - - - 1 I82.lm8_inst.arbiter.WBM1_DAT_I_0_iv_RNO[0] ORCALUT4 C In 0.000 13.583 - I82.lm8_inst.arbiter.WBM1_DAT_I_0_iv_RNO[0] ORCALUT4 Z Out 1.017 14.600 - WBS_DAT_O_m[24] Net - - - - 1 I82.lm8_inst.arbiter.WBM1_DAT_I_0_iv[0] ORCALUT4 B In 0.000 14.600 - I82.lm8_inst.arbiter.WBM1_DAT_I_0_iv[0] ORCALUT4 Z Out 0.449 15.049 - LM8D_DAT_I[0] Net - - - - 2 I82.lm8_inst.LM8.ext_io_din[0] ORCALUT4 C In 0.000 15.049 - I82.lm8_inst.LM8.ext_io_din[0] ORCALUT4 Z Out 0.449 15.497 - ext_io_din[0] Net - - - - 2 I82.lm8_inst.LM8.u1_isp8_core.din_rd_iv_1_0[0] ORCALUT4 A In 0.000 15.497 - I82.lm8_inst.LM8.u1_isp8_core.din_rd_iv_1_0[0] ORCALUT4 Z Out 1.017 16.514 - din_rd_iv_1_0[0] Net - - - - 1 I82.lm8_inst.LM8.u1_isp8_core.din_rd_iv[0] ORCALUT4 C In 0.000 16.514 - I82.lm8_inst.LM8.u1_isp8_core.din_rd_iv[0] ORCALUT4 Z Out 1.153 17.667 - din_rd[0] Net - - - - 3 I82.lm8_inst.LM8.u1_isp8_core.genblk6\.genblk1\.u1_lm8_rfmem pmi_distributed_dpram_32s_5s_8s_noreg_none_binary_EC_pmi_distributed_dpram_3_layer2 Data[0] In 0.000 17.667 - ============================================================================================================================================================================================================= ==================================== Detailed Report for Clock: esquema_global|N_44_inferred_clock ==================================== Starting Points with Worst Slack ******************************** Starting Arrival Instance Reference Type Pin Net Time Slack Clock -------------------------------------------------------------------------------------------------------- I69.cnt[0] esquema_global|N_44_inferred_clock FD1S3DX Q cnt[0] 1.148 993.946 I69.cnt[1] esquema_global|N_44_inferred_clock FD1S3DX Q cnt[1] 1.236 994.000 I69.cnt[2] esquema_global|N_44_inferred_clock FD1S3DX Q cnt[2] 1.044 994.192 I69.cnt[3] esquema_global|N_44_inferred_clock FD1S3DX Q cnt[3] 1.044 994.335 I69.cnt[4] esquema_global|N_44_inferred_clock FD1S3DX Q cnt[4] 1.044 994.335 I69.cnt[5] esquema_global|N_44_inferred_clock FD1S3DX Q cnt[5] 1.148 994.374 I69.cnt[6] esquema_global|N_44_inferred_clock FD1S3DX Q cnt[6] 1.148 994.374 I69.cnt[7] esquema_global|N_44_inferred_clock FD1S3DX Q cnt[7] 1.044 994.621 I69.cnt[8] esquema_global|N_44_inferred_clock FD1S3DX Q cnt[8] 1.044 994.621 I69.cnt[9] esquema_global|N_44_inferred_clock FD1S3DX Q cnt[9] 1.148 994.659 ======================================================================================================== Ending Points with Worst Slack ****************************** Starting Required Instance Reference Type Pin Net Time Slack Clock ----------------------------------------------------------------------------------------------------------------- I69.cnt[19] esquema_global|N_44_inferred_clock FD1S3DX D cnt_3[19] 1000.089 993.946 I69.cnt[17] esquema_global|N_44_inferred_clock FD1S3DX D cnt_3[17] 1000.089 994.088 I69.cnt[18] esquema_global|N_44_inferred_clock FD1S3DX D cnt_3[18] 1000.089 994.088 I69.cnt[16] esquema_global|N_44_inferred_clock FD1S3DX D cnt_3[16] 1000.089 994.231 I69.cnt[20] esquema_global|N_44_inferred_clock FD1S3DX D un2_cnt_1[20] 999.894 994.368 I69.cnt[14] esquema_global|N_44_inferred_clock FD1S3DX D cnt_3[14] 1000.089 994.374 I69.cnt[15] esquema_global|N_44_inferred_clock FD1S3DX D un2_cnt_1[15] 999.894 994.654 I69.cnt[9] esquema_global|N_44_inferred_clock FD1S3DX D cnt_3[9] 1000.089 994.659 I69.cnt[13] esquema_global|N_44_inferred_clock FD1S3DX D un2_cnt_1[13] 999.894 994.796 I69.cnt[11] esquema_global|N_44_inferred_clock FD1S3DX D un2_cnt_1[11] 999.894 994.939 ================================================================================================================= Worst Path Information View Worst Path in Analyst *********************** Path information for path number 1: Requested Period: 1000.000 - Setup time: -0.089 + Clock delay at ending point: 0.000 (ideal) = Required time: 1000.089 - Propagation time: 6.143 - Clock delay at starting point: 0.000 (ideal) = Slack (non-critical) : 993.946 Number of logic level(s): 12 Starting point: I69.cnt[0] / Q Ending point: I69.cnt[19] / D The start point is clocked by esquema_global|N_44_inferred_clock [rising] on pin CK The end point is clocked by esquema_global|N_44_inferred_clock [rising] on pin CK Instance / Net Pin Pin Arrival No. of Name Type Name Dir Delay Time Fan Out(s) ----------------------------------------------------------------------------------------- I69.cnt[0] FD1S3DX Q Out 1.148 1.148 - cnt[0] Net - - - - 4 I69.un2_cnt_1_cry_0_0 CCU2D A1 In 0.000 1.148 - I69.un2_cnt_1_cry_0_0 CCU2D COUT Out 1.545 2.692 - un2_cnt_1_cry_0 Net - - - - 1 I69.un2_cnt_1_cry_1_0 CCU2D CIN In 0.000 2.692 - I69.un2_cnt_1_cry_1_0 CCU2D COUT Out 0.143 2.835 - un2_cnt_1_cry_2 Net - - - - 1 I69.un2_cnt_1_cry_3_0 CCU2D CIN In 0.000 2.835 - I69.un2_cnt_1_cry_3_0 CCU2D COUT Out 0.143 2.978 - un2_cnt_1_cry_4 Net - - - - 1 I69.un2_cnt_1_cry_5_0 CCU2D CIN In 0.000 2.978 - I69.un2_cnt_1_cry_5_0 CCU2D COUT Out 0.143 3.121 - un2_cnt_1_cry_6 Net - - - - 1 I69.un2_cnt_1_cry_7_0 CCU2D CIN In 0.000 3.121 - I69.un2_cnt_1_cry_7_0 CCU2D COUT Out 0.143 3.264 - un2_cnt_1_cry_8 Net - - - - 1 I69.un2_cnt_1_cry_9_0 CCU2D CIN In 0.000 3.264 - I69.un2_cnt_1_cry_9_0 CCU2D COUT Out 0.143 3.406 - un2_cnt_1_cry_10 Net - - - - 1 I69.un2_cnt_1_cry_11_0 CCU2D CIN In 0.000 3.406 - I69.un2_cnt_1_cry_11_0 CCU2D COUT Out 0.143 3.549 - un2_cnt_1_cry_12 Net - - - - 1 I69.un2_cnt_1_cry_13_0 CCU2D CIN In 0.000 3.549 - I69.un2_cnt_1_cry_13_0 CCU2D COUT Out 0.143 3.692 - un2_cnt_1_cry_14 Net - - - - 1 I69.un2_cnt_1_cry_15_0 CCU2D CIN In 0.000 3.692 - I69.un2_cnt_1_cry_15_0 CCU2D COUT Out 0.143 3.835 - un2_cnt_1_cry_16 Net - - - - 1 I69.un2_cnt_1_cry_17_0 CCU2D CIN In 0.000 3.835 - I69.un2_cnt_1_cry_17_0 CCU2D COUT Out 0.143 3.978 - un2_cnt_1_cry_18 Net - - - - 1 I69.un2_cnt_1_cry_19_0 CCU2D CIN In 0.000 3.978 - I69.un2_cnt_1_cry_19_0 CCU2D S0 Out 1.549 5.527 - un2_cnt_1_cry_19_0_S0 Net - - - - 1 I69.cnt_3[19] ORCALUT4 D In 0.000 5.527 - I69.cnt_3[19] ORCALUT4 Z Out 0.617 6.143 - cnt_3[19] Net - - - - 1 I69.cnt[19] FD1S3DX D In 0.000 6.143 - ========================================================================================= ==================================== Detailed Report for Clock: esquema_global|N_45_inferred_clock ==================================== Starting Points with Worst Slack ******************************** Starting Arrival Instance Reference Type Pin Net Time Slack Clock ----------------------------------------------------------------------------------------------------- I7.FF_6 esquema_global|N_45_inferred_clock FD1P3DX Q Q[14] 1.044 475.795 I7.FF_11 esquema_global|N_45_inferred_clock FD1P3DX Q Q[9] 1.044 475.795 I7.FF_13 esquema_global|N_45_inferred_clock FD1P3DX Q Q[7] 1.044 475.795 I7.FF_14 esquema_global|N_45_inferred_clock FD1P3DX Q Q[6] 1.044 475.795 I7.FF_15 esquema_global|N_45_inferred_clock FD1P3DX Q Q[5] 1.044 475.795 I7.FF_16 esquema_global|N_45_inferred_clock FD1P3DX Q Q[4] 1.044 475.795 I7.FF_17 esquema_global|N_45_inferred_clock FD1P3DX Q Q[3] 1.044 475.795 I7.FF_18 esquema_global|N_45_inferred_clock FD1P3DX Q Q[2] 1.044 475.795 I7.FF_19 esquema_global|N_45_inferred_clock FD1P3DX Q Q[1] 1.044 475.795 I7.FF_20 esquema_global|N_45_inferred_clock FD1P3DX Q Q[0] 1.044 475.795 ===================================================================================================== Ending Points with Worst Slack ****************************** Starting Required Instance Reference Type Pin Net Time Slack Clock ------------------------------------------------------------------------------------------------------------- I7.muxb_0 esquema_global|N_45_inferred_clock MUX21 SD dec0_sr1fbd00 480.769 475.795 I7.muxb_1 esquema_global|N_45_inferred_clock MUX21 SD dec0_sr1fbd00 480.769 475.795 I7.muxb_2 esquema_global|N_45_inferred_clock MUX21 SD dec0_sr1fbd00 480.769 475.795 I7.muxb_3 esquema_global|N_45_inferred_clock MUX21 SD dec0_sr1fbd00 480.769 475.795 I7.muxb_4 esquema_global|N_45_inferred_clock MUX21 SD dec0_sr1fbd00 480.769 475.795 I7.muxb_5 esquema_global|N_45_inferred_clock MUX21 SD dec0_sr1fbd00 480.769 475.795 I7.muxb_6 esquema_global|N_45_inferred_clock MUX21 SD dec0_sr1fbd00 480.769 475.795 I7.muxb_7 esquema_global|N_45_inferred_clock MUX21 SD dec0_sr1fbd00 480.769 475.795 I7.muxb_8 esquema_global|N_45_inferred_clock MUX21 SD dec0_sr1fbd00 480.769 475.795 I7.muxb_9 esquema_global|N_45_inferred_clock MUX21 SD dec0_sr1fbd00 480.769 475.795 ============================================================================================================= Worst Path Information View Worst Path in Analyst *********************** Path information for path number 1: Requested Period: 480.769 - Setup time: 0.000 + Clock delay at ending point: 0.000 (ideal) + Estimated clock delay at ending point: 0.000 = Required time: 480.769 - Propagation time: 4.974 - Clock delay at starting point: 0.000 (ideal) = Slack (critical) : 475.795 Number of logic level(s): 4 Starting point: I7.FF_6 / Q Ending point: I7.muxb_0 / SD The start point is clocked by esquema_global|N_45_inferred_clock [rising] on pin CK The end point is clocked by System [rising] Instance / Net Pin Pin Arrival No. of Name Type Name Dir Delay Time Fan Out(s) ---------------------------------------------------------------------------------- I7.FF_6 FD1P3DX Q Out 1.044 1.044 - Q[14] Net - - - - 2 I7.INV_0 INV A In 0.000 1.044 - I7.INV_0 INV Z Out 0.568 1.612 - tdataout14_inv Net - - - - 1 I7.LUT4_4 ROM16X1A AD1 In 0.000 1.612 - I7.LUT4_4 ROM16X1A DO0 Out 1.017 2.629 - func_and_inet_3 Net - - - - 1 I7.LUT4_1 ROM16X1A AD0 In 0.000 2.629 - I7.LUT4_1 ROM16X1A DO0 Out 1.017 3.645 - func_and_inet_6 Net - - - - 1 I7.LUT4_0 ROM16X1A AD3 In 0.000 3.645 - I7.LUT4_0 ROM16X1A DO0 Out 1.329 4.974 - dec0_sr1fbd00 Net - - - - 21 I7.muxb_0 MUX21 SD In 0.000 4.974 - ================================================================================== ==================================== Detailed Report for Clock: esquema_global|clk_ext_sal ==================================== Starting Points with Worst Slack ******************************** Starting Arrival Instance Reference Type Pin Net Time Slack Clock ----------------------------------------------------------------------------------------------- I52.FF_2 esquema_global|clk_ext_sal FD1P3DX Q S1MZ[3] 1.044 996.139 I52.FF_3 esquema_global|clk_ext_sal FD1P3DX Q S1MZ[2] 1.044 996.139 I52.FF_5 esquema_global|clk_ext_sal FD1P3DX Q S1MZ[0] 1.044 996.139 I52.FF_4 esquema_global|clk_ext_sal FD1P3DX Q S1MZ[1] 1.108 996.643 I52.FF_0 esquema_global|clk_ext_sal FD1P3DX Q S1MZ[5] 1.108 997.659 I52.FF_1 esquema_global|clk_ext_sal FD1P3DX Q S1MZ[4] 1.108 997.659 =============================================================================================== Ending Points with Worst Slack ****************************** Starting Required Instance Reference Type Pin Net Time Slack Clock -------------------------------------------------------------------------------------------------- I52.muxb_0 esquema_global|clk_ext_sal MUX21 SD dec0_sr32 1000.000 996.139 I52.muxb_1 esquema_global|clk_ext_sal MUX21 SD dec0_sr32 1000.000 996.139 I52.muxb_2 esquema_global|clk_ext_sal MUX21 SD dec0_sr32 1000.000 996.139 I52.muxb_3 esquema_global|clk_ext_sal MUX21 SD dec0_sr32 1000.000 996.139 I52.muxb_4 esquema_global|clk_ext_sal MUX21 SD dec0_sr32 1000.000 996.139 I52.muxb_5 esquema_global|clk_ext_sal MUX21 SD dec0_sr32 1000.000 996.139 I51 esquema_global|clk_ext_sal AND3 A S1MZ[5] 1000.000 998.892 I51 esquema_global|clk_ext_sal AND3 B S1MZ[4] 1000.000 998.892 I51 esquema_global|clk_ext_sal AND3 C S1MZ[1] 1000.000 998.892 ================================================================================================== Worst Path Information View Worst Path in Analyst *********************** Path information for path number 1: Requested Period: 1000.000 - Setup time: 0.000 + Clock delay at ending point: 0.000 (ideal) + Estimated clock delay at ending point: 0.000 = Required time: 1000.000 - Propagation time: 3.861 - Clock delay at starting point: 0.000 (ideal) = Slack (non-critical) : 996.139 Number of logic level(s): 3 Starting point: I52.FF_2 / Q Ending point: I52.muxb_0 / SD The start point is clocked by esquema_global|clk_ext_sal [rising] on pin CK The end point is clocked by System [rising] Instance / Net Pin Pin Arrival No. of Name Type Name Dir Delay Time Fan Out(s) --------------------------------------------------------------------------------- I52.FF_2 FD1P3DX Q Out 1.044 1.044 - S1MZ[3] Net - - - - 2 I52.INV_0 INV A In 0.000 1.044 - I52.INV_0 INV Z Out 0.568 1.612 - tdataout3_inv Net - - - - 1 I52.LUT4_1 ROM16X1A AD0 In 0.000 1.612 - I52.LUT4_1 ROM16X1A DO0 Out 1.017 2.629 - func_and_inet Net - - - - 1 I52.LUT4_0 ROM16X1A AD3 In 0.000 2.629 - I52.LUT4_0 ROM16X1A DO0 Out 1.233 3.861 - dec0_sr32 Net - - - - 6 I52.muxb_0 MUX21 SD In 0.000 3.861 - ================================================================================= ==================================== Detailed Report for Clock: pll1|CLKOS3_inferred_clock ==================================== Starting Points with Worst Slack ******************************** Starting Arrival Instance Reference Type Pin Net Time Slack Clock --------------------------------------------------------------------------------------------- I43.FF_1 pll1|CLKOS3_inferred_clock FD1P3DX Q ST[2] 1.148 997.091 I8.FF_1 pll1|CLKOS3_inferred_clock FD1P3DX Q SL[2] 1.148 997.091 I43.FF_2 pll1|CLKOS3_inferred_clock FD1P3DX Q ST[1] 1.148 997.091 I8.FF_2 pll1|CLKOS3_inferred_clock FD1P3DX Q SL[1] 1.148 997.091 I27.FF_1 pll1|CLKOS3_inferred_clock FD1P3DX Q RU[2] 1.108 997.131 I27.FF_2 pll1|CLKOS3_inferred_clock FD1P3DX Q RU[1] 1.108 997.131 I43.FF_0 pll1|CLKOS3_inferred_clock FD1P3DX Q ST[3] 1.148 997.659 I8.FF_0 pll1|CLKOS3_inferred_clock FD1P3DX Q SL[3] 1.148 997.659 I43.FF_3 pll1|CLKOS3_inferred_clock FD1P3DX Q ST[0] 1.148 997.659 I8.FF_3 pll1|CLKOS3_inferred_clock FD1P3DX Q SL[0] 1.148 997.659 ============================================================================================= Ending Points with Worst Slack ****************************** Starting Required Instance Reference Type Pin Net Time Slack Clock ------------------------------------------------------------------------------------------------- I43.muxb_0 pll1|CLKOS3_inferred_clock MUX21 SD dec0_sr9 1000.000 997.091 I8.muxb_0 pll1|CLKOS3_inferred_clock MUX21 SD dec0_sr9 1000.000 997.091 I43.muxb_1 pll1|CLKOS3_inferred_clock MUX21 SD dec0_sr9 1000.000 997.091 I8.muxb_1 pll1|CLKOS3_inferred_clock MUX21 SD dec0_sr9 1000.000 997.091 I43.muxb_2 pll1|CLKOS3_inferred_clock MUX21 SD dec0_sr9 1000.000 997.091 I8.muxb_2 pll1|CLKOS3_inferred_clock MUX21 SD dec0_sr9 1000.000 997.091 I43.muxb_3 pll1|CLKOS3_inferred_clock MUX21 SD dec0_sr9 1000.000 997.091 I8.muxb_3 pll1|CLKOS3_inferred_clock MUX21 SD dec0_sr9 1000.000 997.091 I27.muxb_0 pll1|CLKOS3_inferred_clock MUX21 SD dec0_sr9 1000.000 997.131 I27.muxb_1 pll1|CLKOS3_inferred_clock MUX21 SD dec0_sr9 1000.000 997.131 ================================================================================================= Worst Path Information View Worst Path in Analyst *********************** Path information for path number 1: Requested Period: 1000.000 - Setup time: 0.000 + Clock delay at ending point: 0.000 (ideal) + Estimated clock delay at ending point: 0.000 = Required time: 1000.000 - Propagation time: 2.909 - Clock delay at starting point: 0.000 (ideal) = Slack (non-critical) : 997.091 Number of logic level(s): 2 Starting point: I43.FF_1 / Q Ending point: I43.muxb_0 / SD The start point is clocked by pll1|CLKOS3_inferred_clock [rising] on pin CK The end point is clocked by System [rising] Instance / Net Pin Pin Arrival No. of Name Type Name Dir Delay Time Fan Out(s) --------------------------------------------------------------------------------- I43.FF_1 FD1P3DX Q Out 1.148 1.148 - ST[2] Net - - - - 4 I43.INV_0 INV A In 0.000 1.148 - I43.INV_0 INV Z Out 0.568 1.716 - tdataout2_inv Net - - - - 1 I43.LUT4_0 ROM16X1A AD1 In 0.000 1.716 - I43.LUT4_0 ROM16X1A DO0 Out 1.193 2.909 - dec0_sr9 Net - - - - 4 I43.muxb_0 MUX21 SD In 0.000 2.909 - ================================================================================= ==================================== Detailed Report for Clock: System ==================================== Starting Points with Worst Slack ******************************** Starting Arrival Instance Reference Type Pin Net Time Slack Clock -------------------------------------------------------------------------------- I7.muxb_0 System MUX21 Z ldataout20 0.000 480.664 I7.muxb_1 System MUX21 Z ldataout19 0.000 480.664 I7.muxb_2 System MUX21 Z ldataout18 0.000 480.664 I7.muxb_3 System MUX21 Z ldataout17 0.000 480.664 I7.muxb_4 System MUX21 Z ldataout16 0.000 480.664 I7.muxb_5 System MUX21 Z ldataout15 0.000 480.664 I7.muxb_6 System MUX21 Z ldataout14 0.000 480.664 I7.muxb_7 System MUX21 Z ldataout13 0.000 480.664 I7.muxb_8 System MUX21 Z ldataout12 0.000 480.664 I7.muxb_9 System MUX21 Z ldataout11 0.000 480.664 ================================================================================ Ending Points with Worst Slack ****************************** Starting Required Instance Reference Type Pin Net Time Slack Clock ---------------------------------------------------------------------------------- I7.FF_0 System FD1P3DX D ldataout20 480.664 480.664 I7.FF_1 System FD1P3DX D ldataout19 480.664 480.664 I7.FF_2 System FD1P3DX D ldataout18 480.664 480.664 I7.FF_3 System FD1P3DX D ldataout17 480.664 480.664 I7.FF_4 System FD1P3DX D ldataout16 480.664 480.664 I7.FF_5 System FD1P3DX D ldataout15 480.664 480.664 I7.FF_6 System FD1P3DX D ldataout14 480.664 480.664 I7.FF_7 System FD1P3DX D ldataout13 480.664 480.664 I7.FF_8 System FD1P3DX D ldataout12 480.664 480.664 I7.FF_9 System FD1P3DX D ldataout11 480.664 480.664 ================================================================================== Worst Path Information View Worst Path in Analyst *********************** Path information for path number 1: Requested Period: 480.769 - Setup time: 0.106 + Clock delay at ending point: 0.000 (ideal) = Required time: 480.664 - Propagation time: 0.000 - Clock delay at starting point: 0.000 (ideal) - Estimated clock delay at start point: -0.000 = Slack (non-critical) : 480.664 Number of logic level(s): 0 Starting point: I7.muxb_0 / Z Ending point: I7.FF_0 / D The start point is clocked by System [rising] The end point is clocked by esquema_global|N_45_inferred_clock [rising] on pin CK Instance / Net Pin Pin Arrival No. of Name Type Name Dir Delay Time Fan Out(s) -------------------------------------------------------------------------------- I7.muxb_0 MUX21 Z Out 0.000 0.000 - ldataout20 Net - - - - 1 I7.FF_0 FD1P3DX D In 0.000 0.000 - ================================================================================ ##### END OF TIMING REPORT #####] Constraints that could not be applied None Finished final timing analysis (Real Time elapsed 0h:00m:04s; CPU Time elapsed 0h:00m:04s; Memory used current: 181MB peak: 184MB) Finished timing report (Real Time elapsed 0h:00m:04s; CPU Time elapsed 0h:00m:04s; Memory used current: 181MB peak: 184MB) --------------------------------------- Resource Usage Report Part: lcmxo2_1200ze-1 Register bits: 205 of 1280 (16%) PIC Latch: 0 I/O cells: 30 Details: AND2: 1 AND3: 1 AND4: 2 CCU2D: 20 CU2: 21 FADD2B: 6 FD1P3BX: 9 FD1P3DX: 97 FD1P3IX: 8 FD1S3AX: 13 FD1S3BX: 2 FD1S3DX: 69 FD1S3IX: 3 GSR: 1 IB: 9 IFS1P3DX: 4 INV: 31 MUX21: 39 OB: 21 ORCALUT4: 310 OSCH: 1 PFUMX: 17 PUR: 1 ROM16X1A: 13 VHI: 18 VLO: 21 false: 3 true: 6 Mapper successful! At Mapper Exit (Real Time elapsed 0h:00m:04s; CPU Time elapsed 0h:00m:04s; Memory used current: 34MB peak: 184MB) Process took 0h:00m:04s realtime, 0h:00m:04s cputime # Sat Sep 16 03:39:58 2017 ###########################################################]