pn170831033249 #Start recording tcl command: 8/31/2017 02:54:42 #Project Location: C:/TFG/ex2; Project name: esquema_con_gpio prj_project new -name "esquema_con_gpio" -impl "esquema_con_gpio" -dev LCMXO2-7000HE-4TG144C -synthesis "synplify" prj_project save prj_src add "C:/TFG/ex2/esquema_con_gpio.sch" prj_src add "C:/TFG/ex2/dos_gpio/soc/dos_gpio_vhd.vhd" prj_run Synthesis -impl esquema_con_gpio -task Synplify_Synthesis prj_run Translate -impl esquema_con_gpio prj_run Synthesis -impl esquema_con_gpio -task Synplify_Synthesis prj_run Translate -impl esquema_con_gpio prj_src add "C:/TFG/ex2/dos_gpio/soc/dos_gpio.v" prj_run Synthesis -impl esquema_con_gpio -task Synplify_Synthesis prj_run Translate -impl esquema_con_gpio prj_run Translate -impl esquema_con_gpio prj_run Export -impl esquema_con_gpio -task Jedecgen pgr_project save "C:/TFG/ex2/esquema_con_gpio/esquema_con_gpio.xcf" prj_src add -exclude "C:/TFG/ex2/esquema_con_gpio/esquema_con_gpio.xcf" prj_src enable "C:/TFG/ex2/esquema_con_gpio/esquema_con_gpio.xcf" pgr_program run pgr_program set -port FTUSB-1 pgr_program run pgr_project save "C:/TFG/ex2/esquema_con_gpio/esquema_con_gpio.xcf" pgr_project close prj_run Map -impl esquema_con_gpio prj_run Map -impl esquema_con_gpio prj_src remove "C:/TFG/ex2/dos_gpio/soc/dos_gpio_vhd.vhd" prj_run Map -impl esquema_con_gpio prj_src add "C:/TFG/ex2/dos_gpio/soc/dos_gpio_vhd.vhd" prj_src add "C:/TFG/ex2/dos_gpio/soc/system_conf.v" prj_src add "C:/TFG/ex2/dos_gpio/components/gpio/rtl/verilog/gpio.v" "C:/TFG/ex2/dos_gpio/components/gpio/rtl/verilog/tpio.v" prj_src add "C:/TFG/ex2/dos_gpio/components/lm8/rtl/verilog/lm8_alu.v" "C:/TFG/ex2/dos_gpio/components/lm8/rtl/verilog/lm8_core.v" "C:/TFG/ex2/dos_gpio/components/lm8/rtl/verilog/lm8_flow_cntl.v" "C:/TFG/ex2/dos_gpio/components/lm8/rtl/verilog/lm8_idec.v" "C:/TFG/ex2/dos_gpio/components/lm8/rtl/verilog/lm8_include.v" "C:/TFG/ex2/dos_gpio/components/lm8/rtl/verilog/lm8_include_all.v" "C:/TFG/ex2/dos_gpio/components/lm8/rtl/verilog/lm8_interrupt.v" "C:/TFG/ex2/dos_gpio/components/lm8/rtl/verilog/lm8_io_cntl.v" "C:/TFG/ex2/dos_gpio/components/lm8/rtl/verilog/lm8_top.v" prj_run Map -impl esquema_con_gpio prj_src remove "C:/TFG/ex2/dos_gpio/components/lm8/rtl/verilog/lm8_io_cntl.v" "C:/TFG/ex2/dos_gpio/components/lm8/rtl/verilog/lm8_top.v" "C:/TFG/ex2/dos_gpio/components/lm8/rtl/verilog/lm8_interrupt.v" "C:/TFG/ex2/dos_gpio/components/lm8/rtl/verilog/lm8_include_all.v" "C:/TFG/ex2/dos_gpio/components/lm8/rtl/verilog/lm8_include.v" "C:/TFG/ex2/dos_gpio/components/lm8/rtl/verilog/lm8_flow_cntl.v" "C:/TFG/ex2/dos_gpio/components/lm8/rtl/verilog/lm8_idec.v" "C:/TFG/ex2/dos_gpio/components/lm8/rtl/verilog/lm8_alu.v" "C:/TFG/ex2/dos_gpio/components/gpio/rtl/verilog/gpio.v" "C:/TFG/ex2/dos_gpio/components/gpio/rtl/verilog/tpio.v" "C:/TFG/ex2/dos_gpio/components/lm8/rtl/verilog/lm8_core.v" prj_run Map -impl esquema_con_gpio #Stop recording: 8/31/2017 03:32:49 pn170831175445 #Start recording tcl command: 8/31/2017 17:52:23 #Project Location: C:/TFG/ex2; Project name: esquema_con_gpio prj_project open "C:/TFG/ex2/esquema_con_gpio.ldf" #Stop recording: 8/31/2017 17:54:45 pn170904033743 #Start recording tcl command: 9/3/2017 21:42:59 #Project Location: C:/TFG/ex2; Project name: esquema_con_gpio prj_project open "C:/TFG/ex2/esquema_con_gpio.ldf" #Stop recording: 9/4/2017 03:37:43 pn170906011510 #Start recording tcl command: 9/6/2017 01:12:48 #Project Location: C:/TFG/ex2; Project name: esquema_con_gpio prj_project open "C:/TFG/ex2/esquema_con_gpio.ldf" prj_run Export -impl esquema_con_gpio -task Jedecgen prj_run Export -impl esquema_con_gpio -task Jedecgen prj_run Export -impl esquema_con_gpio -task Jedecgen prj_project save prj_project close #Stop recording: 9/6/2017 01:15:10 pn170915024739 #Start recording tcl command: 9/15/2017 02:31:42 #Project Location: C:/TFG/ex2; Project name: esquema_con_gpio prj_project open "C:/TFG/ex2/esquema_con_gpio.ldf" #Stop recording: 9/15/2017 02:47:39