https://uvadoc.uva.es/handle/10324/43515 2026-04-12T05:48:21Z 2026-04-12T05:48:21Z Jimenez-Molinos, F. Vinuesa Sanz, Guillermo García García, Héctor Tarre, A. Tamm, A. Kalam, K. Kukli, K. Dueñas Carazo, Salvador Castán Lanaspa, María Helena González, M.B. Campabadal Segura, Francesca Maldonado, D. Cantudo, A. Roldán, J.B. https://uvadoc.uva.es/handle/10324/66235 2026-03-17T09:19:35Z 2023-01-01T00:00:00Z

The thermal dependence of the resistance in the low resistance state of TiN/Ti/HfO 2 /Pt memristors has been experimentally studied. After modeling the measured I-V curves, the different resistive components (ohmic and non-linear) have been extracted and their thermal behavior estimated. Finally, the intrinsic series resistance linked to the metallic paths, contacts, and the remnants of the filament during resistive switching is also obtained at different temperatures. The results can be employed to propose physically-based models for circuit simulation.

2023-01-01T00:00:00Z Jiménez-Molinos, F. García García, Héctor González, M.B. Dueñas Carazo, Salvador Castán Lanaspa, María Helena Miranda, Enrique Campabadal Segura, Francesca Roldán, J.B. https://uvadoc.uva.es/handle/10324/66147 2026-03-17T09:33:11Z 2021-01-01T00:00:00Z

Hafnium oxide based memristors were fabricated and multilevel programming driven by a capacitor discharge current through the device was performed. Furthermore, the dynamic memdiode model was used for modeling and analyzing the experimental data.

2021-01-01T00:00:00Z Santa Cruz González, C. Sahelices Fernández, Benjamín Jiménez López, Juan Ignacio González Ossorio, Óscar Castán Lanaspa, María Helena González, M.B. Vinuesa Sanz, Guillermo Dueñas Carazo, Salvador Campabadal Segura, Francesca García García, Héctor https://uvadoc.uva.es/handle/10324/66144 2026-03-17T09:17:06Z 2021-01-01T00:00:00Z

A semiempirical memdiode model of resistive switching devices is proposed. This model is a modification of the quasi-static memdiode model (QMM). It is based on the incorporation of time dependencies in the QMM parameters, as well as on the empirically observed asymmetries between the reset and set transition. The model considerably improves the prediction of the response of resistive switching devices to arbitrary input stimuli

2021-01-01T00:00:00Z Milo, V. Anzalone, F. Zambelli, C. Pérez, E. Mahadevaiah, M.K. González Ossorio, Óscar Olivo, P. Wenger, Christian Ielmini, D. https://uvadoc.uva.es/handle/10324/66068 2024-10-04T08:57:13Z 2021-01-01T00:00:00Z

A key requirement for RRAM in neural network accelerators with a large number of synaptic parameters is the multilevel programming. This is hindered by resistance imprecision due to cycle-to-cycle and device-to-device variations. Here, we compare two multilevel programming algorithms to minimize resistance variations in a 4-kbit array of HfO 2 RRAM. We show that gate-based algorithms have the highest reliability. The optimized scheme is used to implement a neural network with 9-level weights, achieving 91.5% (vs. software 93.27%) in MNIST recognition.

2021-01-01T00:00:00Z González-Cordero, G. González, M.B. García García, Héctor Campabadal Segura, Francesca Dueñas Carazo, Salvador Castán Lanaspa, María Helena Jiménez-Molinos, F. Roldán, J.B. https://uvadoc.uva.es/handle/10324/65902 2026-03-17T09:12:28Z 2017-01-01T00:00:00Z

A model for filamentary conduction in RRAMs based on Metal-Insulator-Metal (MIM) structures has been developed. The model describes RRAM resistive switching processes by calculating the formation and rupture of conductive filaments (CFs) in the dielectric. The resistance of the electrodes, of the CF and the hopping current in the gap between the CF tip and the electrode, are taken into consideration. The thermal description of the CF is included by solving the heat equation. The model has been employed to reproduce I-V curves of different RRAM technologies making use of the correct model parameters in each case. Therefore, it is suitable to be implemented in circuit simulators to analyze circuits based on RRAMs under different operation regimes.

2017-01-01T00:00:00Z García García, Héctor Castán Lanaspa, María Helena Dueñas Carazo, Salvador González, M.B. Acero, M.C. Campabadal Segura, Francesca https://uvadoc.uva.es/handle/10324/65896 2026-03-17T09:13:08Z 2017-01-01T00:00:00Z

The electrical properties of Al 2 O 3 -based metal-insulator-semiconductor capacitors have been investigated. Three different metal gate electrodes were used: two mid-gap metals (TiN and tungsten) and aluminum, a metal with a work function close to the silicon electron affinity. Aluminum oxide films were grown on p-type silicon substrates by atomic layer deposition using trymethylaluminum and water as aluminum and oxygen precursors, respectively. The use of aluminum as the gate electrode prevents the formation of defects inside the oxide layers that could trap charge as has been found for W and TiN gate electrodes using C-V curves and flat band voltage transients. The use of TiN or W as gate electrodes increases the interfacial trap density. However, the leakage current, that follows a Fowler-Nordheim behavior, is low when using TiN electrodes due to a higher cathode barrier height.

2017-01-01T00:00:00Z Milo, V. Zambelli, Cristian Olivo, P. Pérez, Eduardo González Ossorio, Óscar Wenger, Christian Ielmini, Daniele https://uvadoc.uva.es/handle/10324/45430 2021-11-08T09:08:19Z 2019-01-01T00:00:00Z

Recently, artificial intelligence reached impressive milestones in many machine learning tasks such as the recognition of faces, objects, and speech. These achievements have been mostly demonstrated in software running on high-performance computers, such as the graphics processing unit (GPU) or the tensor processing unit (TPU). Novel hardware with in-memory processing is however more promising in view of the reduced latency and the improved energy efficiency. In this scenario, emerging memory technologies such as phase change memory (PCM) and resistive switching memory (RRAM), have been proposed for hardware accelerators of both learning and inference tasks. In this work, a multilevel 4kbit RRAM array is used to implement a 2-layer feedforward neural network trained with the MNIST dataset. The performance of the network in the inference mode is compared with recently proposed implementations using the same image dataset demonstrating the higher energy efficiency of our hardware, thanks to low current operation and an innovative multilevel programming scheme. These results support RRAM technology for in-memory hardware accelerators of machine learning.

2019-01-01T00:00:00Z González Ossorio, Óscar Pérez, Eduardo Dueñas Carazo, Salvador Castán Lanaspa, María Helena García García, Héctor Wenger, Christian https://uvadoc.uva.es/handle/10324/45427 2021-05-21T22:18:00Z 2019-01-01T00:00:00Z

The reduction of the pulse width used during the programming of RRAM devices is crucial in order to accomplish fast low-power switching operations. In this work, several pulse width values between 10 μs and 50 ns were evaluated by using the incremental step pulse with verify algorithm (ISPVA) on Al-doped HfO 2 4 kbit RRAM arrays. 1k endurance cycles were performed to assess the switching stability, which showed a remarkable good behavior regardless the pulse width considered. Only the voltages required to perform the switching were impacted by the change of the pulse width. Nevertheless, the voltages needed for each pulse width remain stable along the 1k reset/set cycles. Finally, the data retention, after the endurance test, was evaluated at 150°C for 100 hours. Only a extremely slight increase on the degradation rate of 1 μA after 100 hours was reported between samples programmed by using pulse widths of 10 μs and 50 ns.

2019-01-01T00:00:00Z García García, Héctor González Ossorio, Óscar Dueñas Carazo, Salvador Castán Lanaspa, María Helena https://uvadoc.uva.es/handle/10324/44731 2021-06-24T07:23:09Z 2020-01-01T00:00:00Z

Artificial synaptic devices used in neuromorphic systems need a high number of reachable conductance levels. Resistive switching devices are promising candidates to implement these devices due to their reachable conductance levels. In this work, we have used TiN/Ti/HfO 2 /W capacitors to study the control of the intermediate conductance states using current pulses instead of the usual voltage pulses. Unlike the use of voltage pulses, in this case we can control the HRS to LRS transition (potentiation characteristic). The characteristic is clearly linear when applying current pulses with linearly increasing amplitudes. The potentiation characteristic is not affected by the pulse length, even for lengths lower than 1 μs. In terms of peripheral circuitry, it is desirable to use pulses with identical amplitudes, but in this case no accumulative behavior is observed, and one current pulse is enough to carry the device to the final conductance state achieved for the amplitude used. Finally, it is not possible to control the HRS to LRS transition (depression characteristic) using current pulses due to the abrupt reset transition. However, this transition can be well controlled using voltage pulses.

2020-01-01T00:00:00Z González Ossorio, Óscar Poblador Cester, Samuel Vinuesa Sanz, Guillermo Dueñas Carazo, Salvador Castán Lanaspa, María Helena Maestro Izquierdo, Marcos Bargalló González, Mireia Campabadal Segura, Francesca https://uvadoc.uva.es/handle/10324/44719 2025-01-21T11:02:51Z 2020-01-01T00:00:00Z

Three topologies of TiN/Ti/HfO 2 /W resistive switching memories (RRAM) are proposed in this work: crossbar, isolated and isolated-crossbar configurations. All configurations use the same sequence of technological processes. The different topologies are obtained by customizing the layouts corresponding to the bottom electrode (W), and the silicon oxide layer that is deposited on the bottom electrode. A comparative study of the resistive switching mechanisms in the three configurations has been carried out. DC current-voltage cycles and small signal conductance memory maps of single RRAM show relevant differences among the three topologies. Complex structures containing various devices (series, anti-series, parallel, antiparallel) have also been fabricated. Switching loops and memory maps obtained for these complex structures demonstrate that they are fully operative, validating the technological route to manufacture complete RRAM memory chips.

2020-01-01T00:00:00Z González Ossorio, Óscar Dueñas Carazo, Salvador Castán Lanaspa, María Helena Tamm, Aile Kalam, Kristjan Seemen, Helina Kukli, Kaupo https://uvadoc.uva.es/handle/10324/44677 2021-06-24T07:23:07Z 2018-01-01T00:00:00Z

In this work we study the resistive switching properties of ZrO 2 -HfO 2 based Metal-Insulator-Metal (MIM) devices. We observed different intermediate states and an overall good repetitiveness, expressed in terms of DC and AC parameters. Thin films consisting of mixtures of ZrO 2 and HfO 2 were grown by atomic layer deposition (ALD) on planar Si(100) and TiN substrates by alternately applying certain amounts of constituent binary oxide growth cycles. The experimental results revealed that zirconium oxide rich films provide better resistive switching behavior than pure zirconium oxide or hafnium oxide rich layers.

2018-01-01T00:00:00Z Dueñas Carazo, Salvador Castán Lanaspa, María Helena González Ossorio, Óscar Domínguez, Leidy Azucena García García, Héctor Kalam, Kristjan Kukli, Kaupo Ritala, Mikko Leskelä, Markku https://uvadoc.uva.es/handle/10324/44667 2025-01-21T12:26:40Z 2017-01-01T00:00:00Z

The resistive switching behavior of Ta 2 O 5 -ZrO 2 -based metal-insulator-metal devices was studied. Asymmetrical and repetitive current-voltage loops were observed. Excellent control of admittance parameters in the intermediate states between the high and low resistance ones was achieved, demonstrating suitability to analog and neuromorphic applications. Admittance memory cycles provide relevant information about the switching mechanism, in which the existence of two different metallic species in the dielectric seems to play an important role.

2017-01-01T00:00:00Z