<?xml version="1.0" encoding="UTF-8"?>
<rdf:RDF xmlns="http://purl.org/rss/1.0/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:dc="http://purl.org/dc/elements/1.1/">
<channel rdf:about="https://uvadoc.uva.es/handle/10324/1948">
<title>DEP41 - Otros Documentos (Monografías, Informes, Memorias, Documentos de Trabajo, etc)</title>
<link>https://uvadoc.uva.es/handle/10324/1948</link>
<description>Dpto. Informática (Arquitectura y Tecnología de Computadores, Ciencias de la Computación e Inteligencia ...) - Otros Documentos (Monografías, Informes, Memorias, Documentos de Trabajo, etc)</description>
<items>
<rdf:Seq>
<rdf:li rdf:resource="https://uvadoc.uva.es/handle/10324/83868"/>
<rdf:li rdf:resource="https://uvadoc.uva.es/handle/10324/83404"/>
<rdf:li rdf:resource="https://uvadoc.uva.es/handle/10324/80074"/>
<rdf:li rdf:resource="https://uvadoc.uva.es/handle/10324/75248"/>
<rdf:li rdf:resource="https://uvadoc.uva.es/handle/10324/69758"/>
<rdf:li rdf:resource="https://uvadoc.uva.es/handle/10324/69757"/>
<rdf:li rdf:resource="https://uvadoc.uva.es/handle/10324/58709"/>
<rdf:li rdf:resource="https://uvadoc.uva.es/handle/10324/54127"/>
<rdf:li rdf:resource="https://uvadoc.uva.es/handle/10324/54126"/>
<rdf:li rdf:resource="https://uvadoc.uva.es/handle/10324/54125"/>
<rdf:li rdf:resource="https://uvadoc.uva.es/handle/10324/47864"/>
<rdf:li rdf:resource="https://uvadoc.uva.es/handle/10324/47863"/>
<rdf:li rdf:resource="https://uvadoc.uva.es/handle/10324/41139"/>
<rdf:li rdf:resource="https://uvadoc.uva.es/handle/10324/39043"/>
<rdf:li rdf:resource="https://uvadoc.uva.es/handle/10324/24051"/>
<rdf:li rdf:resource="https://uvadoc.uva.es/handle/10324/24050"/>
</rdf:Seq>
</items>
<dc:date>2026-04-09T11:41:10Z</dc:date>
</channel>
<item rdf:about="https://uvadoc.uva.es/handle/10324/83868">
<title>Open SYCL on heterogeneous GPU systems: A case of study</title>
<link>https://uvadoc.uva.es/handle/10324/83868</link>
<description>Computational platforms for high-performance scientic applications are becoming more heterogenous, including hardware accelerators such as multiple GPUs. Applications in a wide variety of scientic elds require an efcient and careful management&#13;
of the computational resources of this type of hardware to obtain the best possible performance. However, there are currently&#13;
different GPU vendors, architectures and families that can be found in heterogeneous clusters or machines. Programming with the&#13;
vendor provided languages or frameworks, and optimizing for specic devices, may become cumbersome and compromise portability to other systems. To overcome this problem, several proposals for high-level heterogeneous programming have appeared, trying to reduce the development eort and increase functional and performance portability, specically when using GPU hardware accelerators. This paper evaluates the SYCL programming model, using the Open SYCL compiler, from two different perspectives: The performance it offers when dealing with single or multiple GPU devices from the same or different vendors, and the development effort required to implement the code. We use as case of study the Finite Time Lyapunov Exponent calculation over two real-world scenarios and compare the performance and the development eort of its Open SYCL-based version against the equivalent versions that use CUDA or HIP. Based on the experimental results, we observe that the use of SYCL does not lead to a remarkable overhead in terms of the GPU kernels execution time. In general terms, the Open SYCL development eort for the host code is lower than that observed with CUDA or HIP. Moreover, the SYCL version can take advantage of both CUDA and AMD GPU devices simultaneously much easier than directly using the vendor-specic programming solutions.
</description>
<dc:date>2023-01-01T00:00:00Z</dc:date>
</item>
<item rdf:about="https://uvadoc.uva.es/handle/10324/83404">
<title>Bitcoin Protocol Mechanics for Economists: A Compact Reference</title>
<link>https://uvadoc.uva.es/handle/10324/83404</link>
<description>Economists increasingly engage with Bitcoin's macroeconomic and financial implications, yet many debates implicitly assume protocol properties that are rarely stated with mechanical precision. This paper offers a concise technical primer on Bitcoin protocol mechanics, aimed at providing the minimal foundations for interpreting claims about decentralization, immutability, and a credible issuance cap without trusted intermediaries. We explain how transactions encode ownership and transfer via public-key cryptography and digital signatures, why the blockchain functions as an append-only, replicated ledger, and how full nodes, wallets, and miners jointly enforce validity and compliance with the rules. We then describe Proof-of-Work as a coordination and security mechanism, clarifying how confirmations deliver probabilistic finality and why rewriting settled history is computationally prohibitive. The paper also outlines Bitcoin's deterministic issuance schedule via the coinbase reward and halving rule, and briefly situates fee revenue and second-layer protocols as the long-run basis for payments and security as block subsidies decline. Three appendices provide a didactic treatment of transactions, a compact summary of cryptography, and an overview of the mining workflow.
</description>
<dc:date>2026-01-01T00:00:00Z</dc:date>
</item>
<item rdf:about="https://uvadoc.uva.es/handle/10324/80074">
<title>UVAGILE reloaded: automatización basada en el producto de aprendizaje</title>
<link>https://uvadoc.uva.es/handle/10324/80074</link>
<description>Esta colección de documentos proporciona un resumen de los resultados obtenidos en el proyecto "UVagile reloaded: automatización basada en el producto de aprendizaje" durante el curso 2024-2025: - Artículo y presentación del trabajo “Aprendizaje activo de Bases de Datos orientado a competencias en Ingeniería Informática”, publicado en las Actas de las Jornadas sobre Enseñanza Universitaria de la Informática (JENUI): https://aenui.org/actas/. Artículo "De la reflexión al aprendizaje… visible y ágil", presentado en la I Miniweek de Innovación Docente de la Universidad de Valladolid.
</description>
<dc:date>2025-01-01T00:00:00Z</dc:date>
</item>
<item rdf:about="https://uvadoc.uva.es/handle/10324/75248">
<title>Realidad aumentada en la educación</title>
<link>https://uvadoc.uva.es/handle/10324/75248</link>
<description>Con el avance de las tecnologías en los últimos años, principalmente Internet y los nuevos dispositivos móviles como smartphones y tabletas, la Realidad Aumentada se ha convertido en una tecnología accesible casi para cualquier usuario, y no sólo en entornos profesionales o de investigación. Por ello, han aparecido múltiples aplicaciones software, así como muchos proyectos de investigación en diversos campos, entre ellos la educación, que hacen uso de las posibilidades de la Realidad Aumentada. En el presente trabajo se realiza una revisión de la evolución de la Realidad Aumentada desde su aparición en la década de los 60 hasta la fecha, así como de su uso en la educación
</description>
<dc:date>2012-01-01T00:00:00Z</dc:date>
</item>
<item rdf:about="https://uvadoc.uva.es/handle/10324/69758">
<title>Finite-time lyapunov exponent calculation on FPGA using high-level synthesis tools</title>
<link>https://uvadoc.uva.es/handle/10324/69758</link>
<description>As Field Programmable Gate Arrays (FPGAs) computing capabilities continue to grow, also does the interest on building scientific accelerators around them. Tools like Xilinx’s High-Level Synthesis (HLS) help to bridge the gap between traditional high-level languages such as C and C++, and low-level hardware description languages such as VHDL and Verilog. In this report, we study the implementation of a fluid dynamics application, the Finite-Time Lyapunov Exponent (FTLE) calculation, on FPGA using HLS. We provide speed and resource-consumption results for 2- and 3-dimensional cases.
</description>
<dc:date>2024-08-01T00:00:00Z</dc:date>
</item>
<item rdf:about="https://uvadoc.uva.es/handle/10324/69757">
<title>Challenging portability paradigms: FPGA acceleration using SYCL and OpenCL</title>
<link>https://uvadoc.uva.es/handle/10324/69757</link>
<description>As the interest in FPGA-based accelerators for HPC applications increases, new challenges also arise, especially concerning different programming and portability issues. This paper aims to provide a snapshot of the current state of the FPGA tooling and its problems. To do so, we evaluate the performance portability of two frameworks for developing FPGA solutions for HPC (SYCL and OpenCL) when using them to port a highly-parallel application to FPGAs, using both ND-range and single-task type of kernels.&#13;
&#13;
The developer’s general recommendation when using FPGAs is to develop single-task kernels for them, as they are commonly regarded as more suited for such hardware. However, we discovered that, when using high-level approaches such as OpenCL and SYCL to program a highly-parallel application with no FPGA-tailored optimizations, NDrange kernels significantly outperform single-task codes. Specifically, while SYCL struggles to produce efficient FPGA implementations of applications described as single-task codes, its performance excels with ND-range kernels, a result that was unexpectedly favorable.
</description>
<dc:date>2024-01-01T00:00:00Z</dc:date>
</item>
<item rdf:about="https://uvadoc.uva.es/handle/10324/58709">
<title>ChatGPT y su impacto a la hora de elegir una profesión</title>
<link>https://uvadoc.uva.es/handle/10324/58709</link>
<description>Artículo de divulgación sobre el impacto de la inteligencia artificial y las redes neuronales en general y sobre ChatGPT en particular en la sociedad.
</description>
<dc:date>2023-01-01T00:00:00Z</dc:date>
</item>
<item rdf:about="https://uvadoc.uva.es/handle/10324/54127">
<title>Póster - Estudio de Hábitos del Alumnado en el Uso de las Guías Docentes e las Asignaturas Universitarias.</title>
<link>https://uvadoc.uva.es/handle/10324/54127</link>
<description>Este documento presenta el Poster utilizado en la presentación del Trabajo del mismo título presentado en las XXVIII Jornadas sobre la Enseñanza Universitaria de la Informática (JENUI 2022).
</description>
<dc:date>2022-01-01T00:00:00Z</dc:date>
</item>
<item rdf:about="https://uvadoc.uva.es/handle/10324/54126">
<title>Encuesta de Guía Docente - Opiniones Preliminares del Alumnado</title>
<link>https://uvadoc.uva.es/handle/10324/54126</link>
<description>Este documento describe la encuesta realizada con la intención de conocer los hábitos del alumnado universitario en la adquisición de información contenida en las Guías Docentes de las Asignaturas y en el uso de las propias guías docentes. Se recaba información también sobre aquellos aspectos que pueden ser mejorables según su opinión. La encuesta es anónima y de carácter voluntario. Se desarrolló durante los meses de febrero, marzo, abril y mayo de 2022, en la Universidad de Valladolid.&#13;
Esta encuesta fue difundida a toda la comunidad de la universidad en el marco del Proyecto de Innovación Docente PID081-21/22.
</description>
<dc:date>2022-01-01T00:00:00Z</dc:date>
</item>
<item rdf:about="https://uvadoc.uva.es/handle/10324/54125">
<title>Guía del Alumno de Sistemas Distribuidos - Curso 2021-22</title>
<link>https://uvadoc.uva.es/handle/10324/54125</link>
<description>Este documento constituye una guía destinada al alumno para la asignatura de Sistemas Distribuidos del Grado de Ingeniería Informática de la Escuela de Ingeniería Informática de la Universidad de Valladolid. Esta guía contiene una introducción motivada de los objetivos y la utilidad de los conocimientos teóricos y prácticos de la asignatura, con un enfasis especial en el punto de vista del alumno. También se incluye el conjunto de actividades que se desarrollarán y la forma de completarlas satisfactoriamente junto a una estimación del trabajo que requiere cada actividad y la forma de computar el éxito académico, con el fin de que el alumno conozca y pueda trabajar en la adquisición de competencias de la forma más interesante posible para el estudiante.; Este documento se desarrolla en el marco del Proyecto de Innovación Docente de la UVa: PID081-21/22.
</description>
<dc:date>2022-01-01T00:00:00Z</dc:date>
</item>
<item rdf:about="https://uvadoc.uva.es/handle/10324/47864">
<title>OntoROPA Deliverable 2. Proposed Design Specification and Approach.</title>
<link>https://uvadoc.uva.es/handle/10324/47864</link>
<description>OntoROPA deals with the automated creation and maintenance of a critical piece of legal compliance required by the GDPR—the Records of Processing Activities (ROPA). It includes the design of a knowledge graph—an RDF graph—tohandleinformationaboutROPAs,combining alegalprofessional ontology (which will be a part of this graph) with the collection and management of the specific knowledge of the community of privacy and data protection experts.&#13;
The OntoROPA architecture is law and data driven. ROPAs are deemed to be the critical piece of legal compliance from a social perspective: they are the only available source of information, accessible to non- technical people (including citizens, judges, rulers, law experts, data protection users, and supervisors). Thus, this fact makes them a critical piece for GDPR legal compliance for all stakeholders—providers, controllers, supervisors, and companies. This is a market niche.&#13;
Deliverable 2, OntoROPA proposed design specification and approach, is focused on a modular, distributed, and ontological approach for the design of both layers—software and data—where each module is the answer to a legal requirement. Data comply with standards for the aim of interoperability, and the design of both layers are subjected to a legal governance scheme, specifically set to harmonize an innovative design for the marketplace with the law, policy, and ethics framework. On top of that, Deliverable 2 explores the possibilities that blockchain technology offers: the use of TEE for secure processing, the use of verifiable credentials with standard certificates for identity management, and the use of oracles for accessing external services.&#13;
In Deliverable 2, Section 1 introduces the main contents.&#13;
Section 2 presents a solution with two main components: (1) An OWL ontology that collects the expert knowledge from the target domain (ROPA community) for supporting validation and trustworthiness; (2) and the software artifacts that process ROPAs. This section (i) introduces OntoROPA modules—identity, linked RDF ROPAs, validation, certification, proactiveness—,(ii) offers a detailed design specification (ontology and software requirements, methodology, OntoROPA flowchart) (iii) and describes the interfaces for coordination with ONTOCHAIN blocks. Section 3 deals with the impacts. It includes the business model to get into the market as a new Law-Tech Web Service. It describes its main features, the OntoROPA contribution to bridging web semantics and blockchain technologies, and it defines the creation of ONTOCHAIN legal value. Legal knowledge (legal justification) is also required by the Spanish legislation for ROPAs. OntoROPA legal governance system, the&#13;
   2&#13;
  middle-out and inside-out approaches aligned with EU strategies and policies, and the generation of the OntoROPA regulatory legal ecosystem, are explained in detail, including the compatibility between blockchain solutions and GDPR requirements.&#13;
Section 4 copes with the implementation process, comprising ontology modularity, software modularity, and real time performance of the solution (Ontology and Software KPIs, experimental evaluation, and interoperability aspects, followed by a granular implementation plan). This is heading to an OntoROPA standardisation process. Finally, Section 5, highlights in the Conclusion some results and what is next.
</description>
<dc:date>2021-01-01T00:00:00Z</dc:date>
</item>
<item rdf:about="https://uvadoc.uva.es/handle/10324/47863">
<title>OntoROPA Deliverable 1. State of the Art and Ambition.</title>
<link>https://uvadoc.uva.es/handle/10324/47863</link>
<description>OntoROPA is a project proposal to facilitate smart privacy legal compliance using technology capable of providing semantics, intelligence, and trust. This is an innovative proposal for the targeted marketplace—i.e. the legal compliance marketplace— since there are no solutions capable of simultaneously providing the three properties mentioned. OntoROPA deals with the creation and maintenance of a critical piece of legal compliance required by the GDPR, the Records of Processing Activities (ROPA).&#13;
OntoROPA pursues genuine regulatory compliance, with full meaning and legal validity. To this end, the ability to certify registrations, ROPAs, and to validate them are fundamental elements. In short, to prove that the ROPAs are true and that they meet all requirements that the GDPR requires. This is also generating legal evidence.&#13;
OntoROPA ambition is to innovate in legal compliance checking and monitoring, bootstrapping blockchain technology to show that it can also be used for privacy compliance in the new LawTech market. Innovation in legal compliance will be achieved by providing legal value to digital artifacts and procedures created to comply with legal data protection requirements at regional, national and European level. This is something that current tools in the legal compliance market do not provide. Blockchain technology has been put under question by privacy experts, drafters, and rulers because its distributed nature is not entirely compatible with GDPR requirements. OntoROPA will provide to blockchain technology the way to address the issues that have been raised and to remove the technical and legal obstacles. In addition, doing so, it will create a specific market niche, generating a secure and trustworthy legal ecosystem with economic value.&#13;
OntoROPA proposes the creation of a knowledge graph, a RDF graph, to handle information about ROPAs. It combines building a professional ontology that will be part of this graph with the collection and management of the specific knowledge of the community of privacy and data protection experts—mainly including lawyers, legal advisors and scholars, data protection officers, and rulers who are proficient in the creation and manipulation of ROPAs. This will trigger the future implementation of other procedures capable of inferring new knowledge from the available one. Certification and trusthworthiness are included as requirements in the very first phases of its design. Blockchain based solutions will be included and headed towards this aim.&#13;
  &#13;
OntoROPA can benefit from the ONTOCHAIN projects providing innovative and usable methodologies for the following purposes : (i) Certification of the genesis and origins of a ROPA; (ii) validation; (iii) proof of proactivity; (iv) identity management; (v) management of semantics; (vi) and smart community support.&#13;
Synergies with other ONTOCHAIN projects are detailed in section 4. There may be more projects with which such a collaboration is possible. The criteria we followed to elaborate this section is to highlight the projects with whom we started planning an effective cooperation. In section 5 we present the conclusions achieved at this time slot of project development.
</description>
<dc:date>2021-01-01T00:00:00Z</dc:date>
</item>
<item rdf:about="https://uvadoc.uva.es/handle/10324/41139">
<title>Introduciendo la K-­anonimización a los estudiantes del Grado en Ingeniería Informática: una práctica de la asignatura ‘Análisis y Diseño de Algoritmos’</title>
<link>https://uvadoc.uva.es/handle/10324/41139</link>
<description>La K-anonimización es una técnica que se utiliza para salvaguardar la identidad de los sujetos cuyos datos se comparten. Los responsables y encargados de los tratamientos de los datos, en aplicación del principio de responsabilidad proactiva que impone el Reglamento General de Protección de Datos (RGPD), deben tomar las medidas oportunas para evitar la reidentificación de los sujetos a partir de estos datos, siendo una de ellas la utilización de la K-anonimización. En esta línea, la Agencia Española de Protección de Datos (AEPD) ha publicado una nota técnica sobre K-anonimización en la cual introduce este concepto y proporciona un conjunto de pautas y herramientas para llevar a cabo esta tarea. Una tarea cuya responsabilidad habrá de recaer en muchos casos en profesionales de la informática encargados del almacenamiento y tratamiento de datos.&#13;
En este artículo se presenta una experiencia reciente en la asignatura Análisis y Diseño de Algoritmos, del tercer curso del Grado en Ingeniería Informática de la&#13;
Universidad de Valladolid. Durante el curso 2018/2019 se planteó una actividad&#13;
práctica para introducir el concepto de K-anonimización a los alumnos de Informática y enfrentarles al reto de proponer e implementar un algoritmo para resolver este problema. De este modo, además de familiarizar a los alumnos con las nociones básicas sobre K-anonimización, se consiguió que relacionasen las técnicas utilizadas para este fin con los conocimientos que adquieren en sus estudios actuales.
</description>
<dc:date>2019-01-01T00:00:00Z</dc:date>
</item>
<item rdf:about="https://uvadoc.uva.es/handle/10324/39043">
<title>Coarse-grain Load Distribution in Heterogeneous Computing</title>
<link>https://uvadoc.uva.es/handle/10324/39043</link>
<description>HPC heterogeneous clusters are composed by different type of machines (various types of component manufacturers, varying computational capacities), and different hardware accelerators. TThe most common type of data distributions is the equal division of the data across all the nodes. A more sophisticated policy of data distribution is needed to explode the computational capacity of the entire system.
</description>
<dc:date>2019-01-01T00:00:00Z</dc:date>
</item>
<item rdf:about="https://uvadoc.uva.es/handle/10324/24051">
<title>Documentos de diseño de OSHIWASP-2017</title>
<link>https://uvadoc.uva.es/handle/10324/24051</link>
<description>Documentos de Diseño de la plataforma de sensorización de prácticas docentes de física open hardware y software: OSHIWASP
</description>
<dc:date>2017-01-01T00:00:00Z</dc:date>
</item>
<item rdf:about="https://uvadoc.uva.es/handle/10324/24050">
<title>Presentación ponencia ICERI2016: Improving the Physics Laboratory Experience</title>
<link>https://uvadoc.uva.es/handle/10324/24050</link>
<description>Presentación de la ponencia en ICERI2016, del trabajo: Improving the Physics Laboratory Experience Through Sensors on a Eireless Open Source Hardwaare and Software Platform.
</description>
<dc:date>2017-01-01T00:00:00Z</dc:date>
</item>
</rdf:RDF>
