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dc.contributor.authorEstébanez López, Álvaro
dc.contributor.authorLlanos Ferraris, Diego Rafael 
dc.contributor.authorGonzález Escribano, Arturo 
dc.date.accessioned2018-03-17T10:54:14Z
dc.date.available2018-03-17T10:54:14Z
dc.date.issued2015
dc.identifier.citationIntl. Symp. on High Level Parallel Programming and Applications (HLPP 2015), July 2-3, Pisa, Italyes
dc.identifier.urihttp://uvadoc.uva.es/handle/10324/29118
dc.descriptionProducción Científicaes
dc.description.abstractIntel Xeon Phi accelerators are one of the newest devices used in the field of parallel computing. However, there are comparatively few studies concerning their performance when using most of the existing parallelization techniques. One of them is thread-level speculation, a technique that optimistically tries to extract parallelism of loops without the need of a compile-time analysis that guarantees that the loop can be executed in parallel. In this article we evaluate the performance delivered by an Intel Xeon Phi coprocessor when using a software, state-of-the-art thread-level speculative parallelization library in the execution of well-known benchmarks. Our results show that, although the Xeon Phi delivers a relatively good speedup in comparison with a shared-memory architecture in terms of scalability, the low computing power of its computational units when specific vectorization and SIMD instructions are not exploited, indicates that further development of new specific techniques for this platform is needed to make it competitive for the application of speculative parallelization comparing with high-end processors or conventional shared-memory systems.es
dc.format.mimetypeapplication/pdfes
dc.language.isoenges
dc.publisherUniversidad de Valladolid, Escuela de Ingeniería Informáticaes
dc.rights.accessRightsinfo:eu-repo/semantics/openAccesses
dc.rights.urihttp://creativecommons.org/licenses/by/4.0/
dc.titleEvaluating the capabilities of the Xeon Phi platform in the context of software-only, thread-level speculationes
dc.typeinfo:eu-repo/semantics/conferenceObjectes
dc.rights.holderSus autoreses
dc.title.eventIntl. Symp. on High Level Parallel Programming and Applications (HLPP)es
dc.description.projectCastilla-Leon Regional Government (VA172A12-2); MICINN (Spain) and the European Union FEDER (MOGECOPP project TIN2011-25639, HomProg-HetSys project TIN2014-58876-P, CAPAP-H5 network TIN2014-53522-REDT).es
dc.rightsAttribution 4.0 International


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