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| dc.contributor.author | Castro, Manuel de | |
| dc.contributor.author | Vilariño, David L. | |
| dc.contributor.author | Torres, Yuri | |
| dc.contributor.author | Llanos, Diego R. | |
| dc.date.accessioned | 2024-10-04T07:54:47Z | |
| dc.date.available | 2024-10-04T07:54:47Z | |
| dc.date.issued | 2024 | |
| dc.identifier.citation | IEEE Computer, vol. 57, issue 7, pp 66-76, ISSN 0018-9162. | es |
| dc.identifier.issn | 0018-9162 | es |
| dc.identifier.uri | https://uvadoc.uva.es/handle/10324/70413 | |
| dc.description | Producción Científica | es |
| dc.description.abstract | Reconfigurable hardware circuits, such as field-programmable gate arrays, have gained popularity in the high-performance computing (HPC) community in recent years. Nevertheless, their real contribution to accelerating HPC workloads is unclear in both potential and extent. | es |
| dc.format.mimetype | application/pdf | es |
| dc.language.iso | eng | es |
| dc.publisher | IEEE | es |
| dc.rights.accessRights | info:eu-repo/semantics/openAccess | es |
| dc.subject | Informática | es |
| dc.subject.classification | High performance computing | es |
| dc.subject.classification | Circuits | es |
| dc.subject.classification | Hardware | es |
| dc.subject.classification | Field programmable gate arrays | es |
| dc.title | The Role of Field-Programmable Gate Arrays in the Acceleration of Modern High-Performance Computing Workloads | es |
| dc.type | info:eu-repo/semantics/article | es |
| dc.identifier.doi | 10.1109/MC.2024.3378380 | es |
| dc.relation.publisherversion | https://ieeexplore.ieee.org/document/10574415 | es |
| dc.identifier.publicationfirstpage | 66 | es |
| dc.identifier.publicationissue | 7 | es |
| dc.identifier.publicationlastpage | 76 | es |
| dc.identifier.publicationtitle | Computer | es |
| dc.identifier.publicationvolume | 57 | es |
| dc.peerreviewed | SI | es |
| dc.description.project | The work of Manuel de Castro, Yuri Torres, and Diego R. Llanos has been supported in part by Grant PID2022- 142292NB-I00 (NATASHA Project), funded by MCIN/AEI/10.13059/501100011033, and by the European Regional Development Fund’s A Way of Making Europe project. Yuri Torres and Diego R. Llanos have been supported in part by Junta de Castilla y León FEDER Grant VA226P20 (PROPHET-2 Project). Diego R. Llanos has been supported in part by Grant TED2021-130367B-I00, funded by MCIN/AEI/10.13039/501100011033, and by Next Generation EU Plan de Recuperación, Transformación, y Resiliencia. The work of David L. Vilariño has been supported by Grants PID2022-141623NB-I00 and PID2019-104834GB-I00 (funded by MCIN/ AEI/10.13039/501100011033/FEDER, UE) and by the Conselleria de Cultura, Educacion, e Ordenacion Universitaria, Xunta de Galicia (Accreditation ED431C 2022/16). | es |
| dc.identifier.essn | 1558-0814 | es |
| dc.type.hasVersion | info:eu-repo/semantics/publishedVersion | es |
| dc.subject.unesco | 1203 Ciencia de Los Ordenadores | es |
| dc.subject.unesco | 3304 Tecnología de Los Ordenadores | es |
