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dc.contributor.authorTorres de la Sierra, Yuri 
dc.contributor.authorGonzález Escribano, Arturo 
dc.contributor.authorLlanos Ferraris, Diego Rafael 
dc.date.accessioned2024-11-07T09:03:06Z
dc.date.available2024-11-07T09:03:06Z
dc.date.issued2010
dc.identifier.citationCMMSE 2010 (Computational and Mathematical Methods in Science and Engineering), Almería, Spain, june 2010es
dc.identifier.isbn978-84-613-5510-5es
dc.identifier.urihttps://uvadoc.uva.es/handle/10324/71258
dc.descriptionProducción Científicaes
dc.description.abstractTrasgo is a source-to-source compiler system that translates simple high-level specifications of parallel algorithms to lower-level native programs, with data partition and communication details generated automatically. Hitmap is the run-time library used by the backends of Trasgo for hierarchical tiling and mapping of arrays, currently built on top of the MPI message-passing interface. Hitmap includes a plug-in system for automatic data-layouts. In this paper we extend Hitmap with a new type of data-layout techniques suitable for the CUDA parallel programming model. The combination with the previous type of data-layout techniques allow to generate data distributions, at multiple levels of parallelism, for GPU clusters. The new Hitmap version hides to the programmer the details about the machine structure and thread management, allowing to easily generate programs with multiple levels of parallelism in heterogeneous systems. This work opens the road to develop a new back-end for the Trasgo compiler system to automatically generate CUDA programs.es
dc.format.extent4 p.es
dc.format.mimetypeapplication/pdfes
dc.language.isoenges
dc.publisherUniversidad de Salamancaes
dc.rights.accessRightsinfo:eu-repo/semantics/openAccesses
dc.subjectInformáticaes
dc.subject.classificationData layoutes
dc.subject.classificationCUDAes
dc.subject.classificationGPUses
dc.subject.classificationHeterogeneous systemses
dc.titleAutomatic Data Layout at Multiple Levels for CUDAes
dc.typeinfo:eu-repo/semantics/conferenceObjectes
dc.identifier.doi10.5281/zenodo.14049545es
dc.relation.publisherversionhttps://www.researchgate.net/publication/228981173_Automatic_Data_Layout_at_Multiple_Levels_for_CUDAes
dc.title.eventComputational and Mathematical Methods in Science and Engineeringes
dc.description.projectThis research is partly supported by the Ministerio de Educación y Ciencia, Spain (TIN2007-62302), Ministerio de Industria, Spain (FIT-350101-2007-27, FIT-350101-2006-46, TSI-020302-2008-89, CENIT MARTA, CENIT OASIS), Junta de Castilla y León, Spain (VA094A08), and also by the Dutch government STW/PROGRESS project DES.6397. Part of this work was carried out under the HPC-EUROPA project (RII3-CT-2003-506079), with the support of the European Community - Research Infrastructure Action under the FP6 “Structuring the European Research Area” Programme.es
dc.type.hasVersioninfo:eu-repo/semantics/publishedVersiones
dc.subject.unesco1203 Ciencia de Los Ordenadoreses
dc.subject.unesco3304 Tecnología de Los Ordenadoreses


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