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dc.contributor.authorTorres de la Sierra, Yuri 
dc.contributor.authorGonzález Escribano, Arturo 
dc.contributor.authorLlanos Ferraris, Diego Rafael 
dc.date.accessioned2025-02-20T08:58:03Z
dc.date.available2025-02-20T08:58:03Z
dc.date.issued2012
dc.identifier.citationIEEE 10th International Symposium on Parallel and Distributed Processing with Applications (ISPA), 2012, At: Leganés, Madrid, Spain, p. 617-624es
dc.identifier.urihttps://uvadoc.uva.es/handle/10324/75090
dc.descriptionProducción Científicaes
dc.description.abstractThe NVIDIA graphics processing units (GPUs) are playing an important role as general purpose programming devices. The implementation of parallel codes to exploit the GPU hardware architecture is a task for experienced programmers. The threadblock size and shape choice is one of the most important user decisions when a parallel problem is coded. The threadblock configuration has a significant impact on the global performance of the program. While in CUDA parallel programming model it is always necessary to specify the threadblock size and shape, the OpenCL standard also offers an automatic mechanism to take this delicate decision. In this paper we present a study of these criteria for Fermi architecture, introducing a general approach for threadblock choice, and showing that there is considerable room for improvement in OpenCL automatic strategy.es
dc.format.extent8 p.es
dc.format.mimetypeapplication/pdfes
dc.language.isoenges
dc.publisherIEEEes
dc.rights.accessRightsinfo:eu-repo/semantics/openAccesses
dc.subjectInformáticaes
dc.subject.classificationGPGPU, automatic code tuning, Fermi, CUDA, OpenCLes
dc.titleUsing Fermi Architecture Knowledge to Speed up CUDA and OpenCL Programses
dc.typeinfo:eu-repo/semantics/conferenceObjectes
dc.identifier.doi10.1109/ISPA.2012.92es
dc.relation.publisherversionhttps://ieeexplore.ieee.org/document/6280352es
dc.title.eventIEEE 10th International Symposium on Parallel and Distributed Processing with Applications (ISPA), 2012es
dc.description.projectThis research is partly supported by the Ministerio de Industria, Spain (CENIT OCEANLIDER), MICINN (Spain) and the European Union FEDER (CAPAP-H3 network TIN2010- 12011-E, TIN2011-25639), and the HPC-EUROPA2 project (project number: 228398) with the support of the European Commission - Capacities Area - Research Infrastructures Initiative.es
dc.type.hasVersioninfo:eu-repo/semantics/publishedVersiones
dc.subject.unesco1203es
dc.subject.unesco3304es


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