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dc.contributor.authorAndújar Muñoz, Francisco José 
dc.contributor.authorCarratalá-Sáez, Rocío
dc.contributor.authorTorres de la Sierra, Yuri 
dc.contributor.authorGonzález Escribano, Arturo 
dc.contributor.authorLlanos Ferraris, Diego Rafael 
dc.date.accessioned2025-11-06T12:20:08Z
dc.date.available2025-11-06T12:20:08Z
dc.date.issued2026
dc.identifier.citationJournal of Parallel and Distributed Computing Volume 207, January 2026, 105188es
dc.identifier.issn0743-7315es
dc.identifier.urihttps://uvadoc.uva.es/handle/10324/79376
dc.descriptionProducción Científicaes
dc.description.abstractComputational platforms for high-performance scientific applications are increasingly heterogeneous, incorporating multiple GPU accelerators. However, differences in GPU vendors, architectures, and programming models challenge performance portability and ease of development. SYCL provides a unified programming approach, enabling applications to target NVIDIA and AMD GPUs simultaneously while offering higher-level abstractions for data and task management. This paper evaluates SYCL’s performance and development effort using the Finite Time Lyapunov Exponent (FTLE) calculation as a case study. We compare SYCL’s AdaptiveCpp (Ahead-Of-Time and Just-In-Time) and Intel oneAPI compilers, along with different data management strategies (Unified Shared Memory and buffers), against equivalent CUDA and HIP implementations. Our analysis considers single and multi-GPU execution, including heterogeneous setups with GPUs from different vendors. Results show that, while SYCL introduces additional development effort compared to native CUDA and HIP implementations, it enables multi-vendor portability with minimal performance overhead when using specific design options. Based on our findings, we provide development guidelines to help programmers decide when to use SYCL versus vendor-specific alternatives.es
dc.format.mimetypeapplication/pdfes
dc.language.isoenges
dc.publisherElsevieres
dc.rights.accessRightsinfo:eu-repo/semantics/openAccesses
dc.subjectInformáticaes
dc.subject.classificationSYCL; CUDA; HIP; Finite Time Lyapunov Exponent; Performance evaluation; Development effortes
dc.titleOn the development of high-performance, multi-GPU applications on heterogeneous systems leveraging SYCLes
dc.typeinfo:eu-repo/semantics/articlees
dc.identifier.doi10.1016/j.jpdc.2025.105188es
dc.relation.publisherversionhttps://www.sciencedirect.com/science/article/pii/S0743731525001558es
dc.identifier.publicationfirstpage1es
dc.identifier.publicationissue207es
dc.identifier.publicationlastpage24es
dc.identifier.publicationtitleJournal of Parallel and Distributed Computinges
dc.identifier.publicationvolume207es
dc.peerreviewedSIes
dc.description.projectThis work was supported in part by the Spanish Ministerio de Ciencia e Innovación and by the European Regional Development Fund’s “A Way of Making Europe” (NATASHA project, Grant PID2022142292NB-I00, funded by MCIN/AEI/10.13059/501100011033), by Junta de Castilla y León FEDER Grant VA226P20 (PROPHET-2 Project), EuroHPC Joint Undertaking for awarding us access to LUMI at CSC, Finland (project EHPC-DEV-2024D07-079), and by Grant TED2021-130367B-I00, funded by MCIN/AEI/10.13039/501100011033, and by Next Generation EU – Plan de Recuperación, Transformación y Resiliencia.es
dc.type.hasVersioninfo:eu-repo/semantics/publishedVersiones
dc.subject.unesco1203 Ciencia de Los Ordenadoreses
dc.subject.unesco3304 Tecnología de Los Ordenadoreses


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