| dc.contributor.author | Andújar Muñoz, Francisco José | |
| dc.contributor.author | Carratalá-Sáez, Rocío | |
| dc.contributor.author | Torres de la Sierra, Yuri | |
| dc.contributor.author | González Escribano, Arturo | |
| dc.contributor.author | Llanos Ferraris, Diego Rafael | |
| dc.date.accessioned | 2025-11-06T12:20:08Z | |
| dc.date.available | 2025-11-06T12:20:08Z | |
| dc.date.issued | 2026 | |
| dc.identifier.citation | Journal of Parallel and Distributed Computing Volume 207, January 2026, 105188 | es |
| dc.identifier.issn | 0743-7315 | es |
| dc.identifier.uri | https://uvadoc.uva.es/handle/10324/79376 | |
| dc.description | Producción Científica | es |
| dc.description.abstract | Computational platforms for high-performance scientific applications are increasingly heterogeneous, incorporating multiple GPU accelerators. However, differences in GPU vendors, architectures, and programming models challenge performance portability and ease of development. SYCL provides a unified programming approach, enabling applications to target NVIDIA and AMD GPUs simultaneously while offering higher-level abstractions for data and task management. This paper evaluates SYCL’s performance and development effort using the Finite Time Lyapunov Exponent (FTLE) calculation as a case study. We compare SYCL’s AdaptiveCpp (Ahead-Of-Time and Just-In-Time) and Intel oneAPI compilers, along with different data management strategies (Unified Shared Memory and buffers), against equivalent CUDA and HIP implementations. Our analysis considers single and multi-GPU execution, including heterogeneous setups with GPUs from different vendors. Results show that, while SYCL introduces additional development effort compared to native CUDA and HIP implementations, it enables multi-vendor portability with minimal performance overhead when using specific design options. Based on our findings, we provide development guidelines to help programmers decide when to use SYCL versus vendor-specific alternatives. | es |
| dc.format.mimetype | application/pdf | es |
| dc.language.iso | eng | es |
| dc.publisher | Elsevier | es |
| dc.rights.accessRights | info:eu-repo/semantics/openAccess | es |
| dc.subject | Informática | es |
| dc.subject.classification | SYCL; CUDA; HIP; Finite Time Lyapunov Exponent; Performance evaluation; Development effort | es |
| dc.title | On the development of high-performance, multi-GPU applications on heterogeneous systems leveraging SYCL | es |
| dc.type | info:eu-repo/semantics/article | es |
| dc.identifier.doi | 10.1016/j.jpdc.2025.105188 | es |
| dc.relation.publisherversion | https://www.sciencedirect.com/science/article/pii/S0743731525001558 | es |
| dc.identifier.publicationfirstpage | 1 | es |
| dc.identifier.publicationissue | 207 | es |
| dc.identifier.publicationlastpage | 24 | es |
| dc.identifier.publicationtitle | Journal of Parallel and Distributed Computing | es |
| dc.identifier.publicationvolume | 207 | es |
| dc.peerreviewed | SI | es |
| dc.description.project | This work was supported in part by the Spanish Ministerio de Ciencia e Innovación and by the European Regional Development Fund’s “A Way of Making Europe” (NATASHA project, Grant PID2022142292NB-I00, funded by MCIN/AEI/10.13059/501100011033), by Junta de Castilla y León FEDER Grant VA226P20 (PROPHET-2 Project), EuroHPC Joint Undertaking for awarding us access to LUMI at CSC, Finland (project EHPC-DEV-2024D07-079), and by Grant TED2021-130367B-I00, funded by MCIN/AEI/10.13039/501100011033, and by Next Generation EU – Plan de Recuperación, Transformación y Resiliencia. | es |
| dc.type.hasVersion | info:eu-repo/semantics/publishedVersion | es |
| dc.subject.unesco | 1203 Ciencia de Los Ordenadores | es |
| dc.subject.unesco | 3304 Tecnología de Los Ordenadores | es |