<?xml version="1.0" encoding="UTF-8"?><?xml-stylesheet type="text/xsl" href="static/style.xsl"?><OAI-PMH xmlns="http://www.openarchives.org/OAI/2.0/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.openarchives.org/OAI/2.0/ http://www.openarchives.org/OAI/2.0/OAI-PMH.xsd"><responseDate>2026-04-14T19:21:09Z</responseDate><request verb="GetRecord" identifier="oai:uvadoc.uva.es:10324/70413" metadataPrefix="mods">https://uvadoc.uva.es/oai/request</request><GetRecord><record><header><identifier>oai:uvadoc.uva.es:10324/70413</identifier><datestamp>2025-02-13T08:12:48Z</datestamp><setSpec>com_10324_1165</setSpec><setSpec>com_10324_931</setSpec><setSpec>com_10324_894</setSpec><setSpec>col_10324_1335</setSpec></header><metadata><mods:mods xmlns:mods="http://www.loc.gov/mods/v3" xmlns:doc="http://www.lyncode.com/xoai" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-1.xsd">
<mods:name>
<mods:namePart>Castro Caballero, Manuel De</mods:namePart>
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<mods:name>
<mods:namePart>Vilariño, David L.</mods:namePart>
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<mods:name>
<mods:namePart>Torres de la Sierra, Yuri</mods:namePart>
</mods:name>
<mods:name>
<mods:namePart>Llanos Ferraris, Diego Rafael</mods:namePart>
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<mods:dateAvailable encoding="iso8601">2024-10-04T07:54:47Z</mods:dateAvailable>
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<mods:dateAccessioned encoding="iso8601">2024-10-04T07:54:47Z</mods:dateAccessioned>
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<mods:originInfo>
<mods:dateIssued encoding="iso8601">2024</mods:dateIssued>
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<mods:identifier type="citation">IEEE Computer, vol. 57, issue 7, pp 66-76, ISSN 0018-9162.</mods:identifier>
<mods:identifier type="issn">0018-9162</mods:identifier>
<mods:identifier type="uri">https://uvadoc.uva.es/handle/10324/70413</mods:identifier>
<mods:identifier type="doi">10.1109/MC.2024.3378380</mods:identifier>
<mods:identifier type="publicationfirstpage">66</mods:identifier>
<mods:identifier type="publicationissue">7</mods:identifier>
<mods:identifier type="publicationlastpage">76</mods:identifier>
<mods:identifier type="publicationtitle">Computer</mods:identifier>
<mods:identifier type="publicationvolume">57</mods:identifier>
<mods:identifier type="essn">1558-0814</mods:identifier>
<mods:abstract>Reconfigurable hardware circuits, such as field-programmable gate arrays, have gained popularity in the high-performance computing (HPC) community in recent years. Nevertheless, their real contribution to accelerating HPC workloads is unclear in both potential and extent.</mods:abstract>
<mods:language>
<mods:languageTerm>eng</mods:languageTerm>
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<mods:accessCondition type="useAndReproduction">info:eu-repo/semantics/openAccess</mods:accessCondition>
<mods:subject>
<mods:topic>Informática</mods:topic>
</mods:subject>
<mods:titleInfo>
<mods:title>The role of field-programmable gate arrays in the acceleration of modern high-performance computing workloads</mods:title>
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