2026-05-05T10:27:35Zhttps://uvadoc.uva.es/oai/request

oai:uvadoc.uva.es:10324/719072025-03-26T19:10:05Zcom_10324_1191com_10324_931com_10324_894col_10324_1381

A Novel Design Method for Digital FIR/IIR Filters Based on the Shuffle Frog-Leaping Algorithm 27th. European Signal Processing Conference, EUSIPCO 2019 Jiménez Galindo, Daniel Casaseca de la Higuera, Juan Pablo San José Revuelta, Luis Miguel Procesado de señal Shuffled flog-leaping algorithm FIR design IIR design Digital filter Diseño de filtros digitales Computación natural 3306 Ingeniería y Tecnología Eléctricas 3325 Tecnología de las Telecomunicaciones Producción Científica The design of both FIR and IIR digital filters is a multi-variable optimization problem, where traditional algorithms fail to obtain optimal solutions. A modified Shuffled Flog Leaping Algorithm (SFLA) is here proposed for the design of FIR and IIR discrete-time filters as close as possible to the desired filter frequency response. This algorithm can be considered a type of memetic algorithm. In this paper, simulations prove the obtained filters outperform those designed using the traditional bilinear Z transform (BZT) method with elliptic approximation. Besides, results are close to, and even slightly better, than those reported in recent bio-inspired approaches using algorithms such as particle swarm optimization (PSO), differential evolution (DE) and regularized global optimization (RGA). Procesado de señal Diseño de filtros digitales FIR IIR Digital filter design SFLA Signal processing 2024-11-27T09:26:23Z 2024-11-27T09:26:23Z 2019 info:eu-repo/semantics/conferenceObject info:eu-repo/semantics/acceptedVersion 27th. European Signal Processing Conference, EUSIPCO 2019, La Coruña, Spain, 2-6 Septiembre 2019, pp. 1-5. 978-9-0827-9703-9 https://uvadoc.uva.es/handle/10324/71907 10.23919/EUSIPCO.2019.8903129 eng https://ieeexplore.ieee.org/document/8903129 Attribution-NonCommercial-NoDerivatives 4.0 Internacional info:eu-repo/semantics/openAccess http://creativecommons.org/licenses/by-nc-nd/4.0/ 5 p. application/pdf IEEE, Institute of Electrical and Electronics Engineers https://uvadoc.uva.es/bitstream/10324/71907/4/Postprint_EUSIPCO_2019.pdf.jpg Hispana TEXT http://creativecommons.org/licenses/by-nc-nd/4.0/ UVaDOC. Repositorio Documental de la Universidad de Valladolid https://uvadoc.uva.es/handle/10324/71907