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oai:uvadoc.uva.es:10324/790032025-10-24T19:05:03Zcom_10324_38col_10324_787

Bush Espinosa, Lydia 2025-10-24T07:44:19Z 2025-10-24T07:44:19Z 2025 https://uvadoc.uva.es/handle/10324/79003 This Master’s Thesis presents the design and simulation of a fully integrated testbench for the evaluation of memristive devices, with a specific focus on organic memristors. Unlike conventional systems that inject voltage and measure current, this work proposes a novel approach based on current injection and voltage sensing, offering better control over the excitation signal and ensuring compatibility with sensitive, low-voltage devices. Organic memristors, known for their low-power operation, scalability, and compatibility with flexible electronics, require non-invasive readout techniques due to their sensitivity to electrical stress, as any memristor. The system is divided into three main functional blocks: a programmable current source capable of supplying a wide range of currents; a memristor selector that enables polarity and device control; and a logic block that manages selection signals and test modes. Designed using 0.18 μm CMOS technology, the circuit allows safe readout through low- voltage, short-duration current pulses. Extensive simulations validate the system’s robustness, precision, and adaptability, offering a promising solution for the future integration and char- acterization of emerging memristive technologies. eng info:eu-repo/semantics/openAccess http://creativecommons.org/licenses/by-nc-nd/4.0/ Attribution-NonCommercial-NoDerivatives 4.0 Internacional Design of a testbench for the evaluation of memristors based on organic compounds info:eu-repo/semantics/masterThesis