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oai:uvadoc.uva.es:10324/704372025-02-20T10:21:28Zcom_10324_1165com_10324_931com_10324_894col_10324_1335

Using SPEC CPU2006 to evaluate the sequential and parallel code generated by commercial and open-source compilers Aldea López, Sergio Llanos Ferraris, Diego Rafael González Escribano, Arturo Informática Compiler performance Automatic parallelization Benchmarking 1203 Ciencia de Los Ordenadores 3304 Tecnología de Los Ordenadores Producción Científica The role of the compiler is fundamental to exploit the hardware capabili- ties of a system running a particular application, minimizing the sequential execution time and, in some cases, offering the possibility of parallelizing part of the code automatically. This paper relies on the SPEC CPU2006 v1.1 benchmark suite to eval- uate the performance of the code generated by three widely-used compilers (Intel C++/Fortran Compiler 11.0, Sun Studio 12 and GCC 4.3.2). Performance is measure in terms of base speed for reference problem sizes. Both sequential and automatic parallel performance obtained is analyzed, using different hardware architectures and configurations. The study includes a detailed description of the different problems that arise while compiling SPEC CPU2006 benchmarks with these tools, an informa- tion difficult to obtain elsewhere. Having in mind that performance is a moving target in the field of compilers, our evaluation shows that the sequential code generated by both Sun and Intel compilers for the SPEC CPU2006 integer benchmarks present a similar performance, while the floating-point code generated by Intel compiler is faster than its competitors. With respect to the auto-parallelization options offered by Intel and Sun compilers, our study shows that their benefits only apply to some floating-point benchmarks, with an average speedup of 1.2× with four processors. Meanwhile, the GCC suite evaluated is not capable of compiling the SPEC CPU2006 benchmark with auto-parallelization options enabled. This research was partly supported by the Ministerio de Educación, Spain (TIN2007-62302), Ministerio de Industria, Spain (FIT-350101-2007-27, FIT-350101-2006-46, TSI- 020302-2008-89, CENIT MARTA, CENIT OASIS), Junta de Castilla y León, Spain (VA094A08), and also by the Dutch government STW/PROGRESS project DES.6397. Part of this work was carried out under the HPC-EUROPA project (RII3-CT-2003-506079), with the support of the European Community—Research Infrastructure Action under the FP6 “Structuring the European Research Area” Programme. 2024-10-04T15:05:09Z 2024-10-04T15:05:09Z 2010 info:eu-repo/semantics/article info:eu-repo/semantics/publishedVersion https://doi.org/10.1007/s11227-010-0449-4 The Journal of Supercomputing, 59(1), January 2012, pages 486-498, ISSN 0920-8542 0920-8542 https://uvadoc.uva.es/handle/10324/70437 486 1 498 The Journal of Supercomputing 59 1573-0484 eng https://link.springer.com/article/10.1007/s11227-010-0449-4 info:eu-repo/semantics/openAccess application/pdf Springer