RT info:eu-repo/semantics/article
T1 Programming pulse width assessment for reliable and low-energy endurance performance in Al : HfO2-based RRAM arrays
A1 Pérez, Eduardo
A1 González Ossorio, Óscar
A1 Dueñas Carazo, Salvador
A1 Castán Lanaspa, María Helena
A1 García García, Héctor
A1 Wenger, Christian
K1 Programming algorithm
K1 Algoritmo de programación
K1 Pulse width
K1 Ancho de pulsos
K1 Data retention
K1 Retención de datos
AB A crucial step in order to achieve fast and low-energy switching operations in resistive random access memory (RRAM) memories is the reduction of the programming pulse width. In this study, the incremental step pulse with verify algorithm (ISPVA) was implemented by using different pulse widths between 10 μ s and 50 ns and assessed on Al-doped HfO2 4 kbit RRAM memory arrays. The switching stability was assessed by means of an endurance test of 1k cycles. Both conductive levels and voltages needed for switching showed a remarkable good behavior along 1k reset/set cycles regardless the programming pulse width implemented. Nevertheless, the distributions of voltages as well as the amount of energy required to carry out the switching operations were definitely affected by the value of the pulse width. In addition, the data retention was evaluated after the endurance analysis by annealing the RRAM devices at 150 °C along 100 h. Just an almost negligible increase on the rate of degradation of about 1 μ A at the end of the 100 h of annealing was reported between those samples programmed by employing a pulse width of 10 μ s and those employing 50 ns. Finally, an endurance performance of 200k cycles without any degradation was achieved on 128 RRAM devices by using programming pulses of 100 ns width.
PB MDPI
SN 2079-9292
YR 2020
FD 2020
LK http://uvadoc.uva.es/handle/10324/44680
UL http://uvadoc.uva.es/handle/10324/44680
LA eng
NO Electronics. 2020, vol. 9, n. 5. 10 p.
NO Producción Científica
DS UVaDOC
RD 21-dic-2024