RT info:eu-repo/semantics/bookPart
T1 Thread-level Speculative Parallelization
A1 Llanos Ferraris, Diego Rafael
K1 Informática
K1 1203 Ciencia de Los Ordenadores
K1 3304 Tecnología de Los Ordenadores
AB The basic idea under speculative parallelization (also called thread-level speculation) is to assign the execution of different blocks of consecutive iterations to different threads, running each one on its own processor. While execution proceeds, software monitor ensures that no thread consumes an incorrect version of a value that should be calculated by a predecessor, therefore violating sequential semantics. If such a dependence violation occur, the monitor stops the parallel execution of the offending threads, discards iterations incorrectly calculated, and restart their execution using the correct values.
PB CINECA, Italy
SN 88-86037-15-5
YR 2004
FD 2004
LK https://uvadoc.uva.es/handle/10324/72208
UL https://uvadoc.uva.es/handle/10324/72208
LA eng
NO Thread-level Speculative Parallelization. Diego R. Llanos. In: Science and Supercomputing in Europe, HPC-Europa 2004 Annual Report, ISBN 88-86037-15-5, pages 211-213, 2004.
NO Producción Científica
DS UVaDOC
RD 22-ene-2025