RT info:eu-repo/semantics/article
T1 Implementation of a motion estimation algorithm for Intel FPGAs using OpenCL
A1 Castro, Manuel de
A1 Osorio, Roberto R.
A1 Vilariño, David L.
A1 González Escribano, Arturo
A1 Llanos Ferraris, Diego Rafael
K1 FPGA
K1 OpenCL
K1 Motion estimation
K1 Video coding
K1 1203.17 Informática
K1 12 Matemáticas
AB Motion Estimation is one of the main tasks behind any video encoder. It is a compu-tationally costly task; therefore, it is usually delegated to specific or reconfigurablehardware, such as FPGAs. Over the years, multiple FPGA implementations havebeen developed, mainly using hardware description languages such as Verilog orVHDL. Since programming using hardware description languages is a complex task,it is desirable to use higher-level languages to develop FPGA applications.The aimof this work is to evaluate OpenCL, in terms of expressiveness, as a tool for devel-oping this kind of FPGA applications. To do so, we present and evaluate a parallelimplementation of the Block Matching Motion Estimation process using OpenCLfor Intel FPGAs, usable and tested on an Intel Stratix 10 FPGA. The implementa-tion efficiently processes Full HD frames completely inside the FPGA. In this work,we show the resource utilization when synthesizing the code on an Intel Stratix 10FPGA, as well as a performance comparison with multiple CPU implementationswith varying levels of optimization and vectorization capabilities. We also comparethe proposed OpenCL implementation, in terms of resource utilization and perfor-mance, with estimations obtained from an equivalent VHDL implementation.
PB Springer
SN 0920-8542
YR 2023
FD 2023
LK https://uvadoc.uva.es/handle/10324/58513
UL https://uvadoc.uva.es/handle/10324/58513
LA eng
NO The Journal of Supercomputing, 2023.
NO Producción Científica
DS UVaDOC
RD 21-may-2024