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dc.contributor.author | González Ossorio, Óscar | |
dc.contributor.author | Pérez, Eduardo | |
dc.contributor.author | Dueñas Carazo, Salvador | |
dc.contributor.author | Castán Lanaspa, María Helena | |
dc.contributor.author | García García, Héctor | |
dc.contributor.author | Wenger, Christian | |
dc.date.accessioned | 2021-03-02T08:21:59Z | |
dc.date.available | 2021-03-02T08:21:59Z | |
dc.date.issued | 2019 | |
dc.identifier.citation | 2019 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS). Grenoble, France: IEEE, 2019 | es |
dc.identifier.isbn | 978-1-7281-1658-7 | es |
dc.identifier.uri | http://uvadoc.uva.es/handle/10324/45427 | |
dc.description | Producción Científica | es |
dc.description.abstract | The reduction of the pulse width used during the programming of RRAM devices is crucial in order to accomplish fast low-power switching operations. In this work, several pulse width values between 10 μs and 50 ns were evaluated by using the incremental step pulse with verify algorithm (ISPVA) on Al-doped HfO 2 4 kbit RRAM arrays. 1k endurance cycles were performed to assess the switching stability, which showed a remarkable good behavior regardless the pulse width considered. Only the voltages required to perform the switching were impacted by the change of the pulse width. Nevertheless, the voltages needed for each pulse width remain stable along the 1k reset/set cycles. Finally, the data retention, after the endurance test, was evaluated at 150°C for 100 hours. Only a extremely slight increase on the degradation rate of 1 μA after 100 hours was reported between samples programmed by using pulse widths of 10 μs and 50 ns. | es |
dc.format.extent | 4 p. | es |
dc.format.mimetype | application/pdf | es |
dc.language.iso | eng | es |
dc.publisher | IEEE Xplore | es |
dc.rights.accessRights | info:eu-repo/semantics/openAccess | es |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | * |
dc.subject | Resistive RAM memory (RRAM) | es |
dc.subject | Memoria RAM resistiva (RRAM) | es |
dc.subject | Programming algorithm | es |
dc.subject | Algoritmo de programación | es |
dc.subject | Pulse width | es |
dc.subject | Ancho de pulsos | es |
dc.title | Effective reduction of the programing pulse width in Al: HfO2-based RRAM arrays | es |
dc.type | info:eu-repo/semantics/conferenceObject | es |
dc.rights.holder | © 2019 IEEE Xplore | es |
dc.identifier.doi | 10.1109/EUROSOI-ULIS45800.2019.9041880 | es |
dc.relation.publisherversion | https://ieeexplore.ieee.org/document/9041880 | es |
dc.title.event | 2019 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS) | es |
dc.description.project | German Research Foundation (project FOR2093) | es |
dc.description.project | Ministerio de Economía, Industria y Competitividad (grant TEC2017-84321-C4-2-R) | es |
dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 Internacional | * |
dc.type.hasVersion | info:eu-repo/semantics/publishedVersion | es |
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