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dc.contributor.authorGonzález Ossorio, Óscar 
dc.contributor.authorPérez, Eduardo
dc.contributor.authorDueñas Carazo, Salvador 
dc.contributor.authorCastán Lanaspa, María Helena 
dc.contributor.authorGarcía García, Héctor 
dc.contributor.authorWenger, Christian
dc.date.accessioned2021-03-02T08:21:59Z
dc.date.available2021-03-02T08:21:59Z
dc.date.issued2019
dc.identifier.citation2019 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS). Grenoble, France: IEEE, 2019es
dc.identifier.isbn978-1-7281-1658-7es
dc.identifier.urihttp://uvadoc.uva.es/handle/10324/45427
dc.descriptionProducción Científicaes
dc.description.abstractThe reduction of the pulse width used during the programming of RRAM devices is crucial in order to accomplish fast low-power switching operations. In this work, several pulse width values between 10 μs and 50 ns were evaluated by using the incremental step pulse with verify algorithm (ISPVA) on Al-doped HfO 2 4 kbit RRAM arrays. 1k endurance cycles were performed to assess the switching stability, which showed a remarkable good behavior regardless the pulse width considered. Only the voltages required to perform the switching were impacted by the change of the pulse width. Nevertheless, the voltages needed for each pulse width remain stable along the 1k reset/set cycles. Finally, the data retention, after the endurance test, was evaluated at 150°C for 100 hours. Only a extremely slight increase on the degradation rate of 1 μA after 100 hours was reported between samples programmed by using pulse widths of 10 μs and 50 ns.es
dc.format.extent4 p.es
dc.format.mimetypeapplication/pdfes
dc.language.isoenges
dc.publisherIEEE Xplorees
dc.rights.accessRightsinfo:eu-repo/semantics/openAccesses
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/*
dc.subjectResistive RAM memory (RRAM)es
dc.subjectMemoria RAM resistiva (RRAM)es
dc.subjectProgramming algorithmes
dc.subjectAlgoritmo de programaciónes
dc.subjectPulse widthes
dc.subjectAncho de pulsoses
dc.titleEffective reduction of the programing pulse width in Al: HfO2-based RRAM arrayses
dc.typeinfo:eu-repo/semantics/conferenceObjectes
dc.rights.holder© 2019 IEEE Xplorees
dc.identifier.doi10.1109/EUROSOI-ULIS45800.2019.9041880es
dc.relation.publisherversionhttps://ieeexplore.ieee.org/document/9041880es
dc.title.event2019 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS)es
dc.description.projectGerman Research Foundation (project FOR2093)es
dc.description.projectMinisterio de Economía, Industria y Competitividad (grant TEC2017-84321-C4-2-R)es
dc.rightsAttribution-NonCommercial-NoDerivatives 4.0 Internacional*
dc.type.hasVersioninfo:eu-repo/semantics/publishedVersiones


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