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Título
The Role of Field-Programmable Gate Arrays in the Acceleration of Modern High-Performance Computing Workloads
Año del Documento
2024
Editorial
IEEE
Descripción
Producción Científica
Documento Fuente
IEEE Computer, vol. 57, issue 7, pp 66-76, ISSN 0018-9162.
Abstract
Reconfigurable hardware circuits, such as field-programmable gate arrays, have gained popularity in the high-performance computing (HPC) community in recent years. Nevertheless, their real contribution to accelerating HPC workloads is unclear in both potential and extent.
Materias (normalizadas)
Informática
Materias Unesco
1203 Ciencia de Los Ordenadores
3304 Tecnología de Los Ordenadores
Palabras Clave
High performance computing
Circuits
Hardware
Field programmable gate arrays
ISSN
0018-9162
Revisión por pares
SI
Patrocinador
The work of Manuel de Castro, Yuri Torres, and Diego R. Llanos has been supported in part by Grant PID2022- 142292NB-I00 (NATASHA Project), funded by MCIN/AEI/10.13059/501100011033, and by the European Regional Development Fund’s A Way of Making Europe project. Yuri Torres and Diego R. Llanos have been supported in part by Junta de Castilla y León FEDER Grant VA226P20 (PROPHET-2 Project). Diego R. Llanos has been supported in part by Grant TED2021-130367B-I00, funded by MCIN/AEI/10.13039/501100011033, and by Next Generation EU Plan de Recuperación, Transformación, y Resiliencia. The work of David L. Vilariño has been supported by Grants PID2022-141623NB-I00 and PID2019-104834GB-I00 (funded by MCIN/ AEI/10.13039/501100011033/FEDER, UE) and by the Conselleria de Cultura, Educacion, e Ordenacion Universitaria, Xunta de Galicia (Accreditation ED431C 2022/16).
Version del Editor
Idioma
eng
Tipo de versión
info:eu-repo/semantics/publishedVersion
Derechos
openAccess
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