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dc.contributor.authorCámara Moreno, Jesús 
dc.contributor.authorCuenca, Javier
dc.contributor.authorGiménez, Domingo
dc.date.accessioned2025-01-27T17:38:56Z
dc.date.available2025-01-27T17:38:56Z
dc.date.issued2020
dc.identifier.citationThe Journal of Supercomputing, 2020, Volume 76, Issue 12, Pages 9922-9941es
dc.identifier.issn0920-8542es
dc.identifier.urihttps://uvadoc.uva.es/handle/10324/74455
dc.descriptionProducción Científicaes
dc.description.abstractA hierarchical approach for autotuning linear algebra routines on heterogeneous platforms is presented. Hierarchy helps to alleviate the difficulties of tuning parallel routines for high-performance computing systems. This paper analyzes the application of the hierarchical approach at both the hardware and software levels, using the basic matrix multiplication and the Strassen multiplication as proof of concept on multicore+coprocessor nodes. In this way, the hierarchical approach allows partial delegation of the efficient exploitation of the computing units in the node to the underlying direct autotuned matrix multiplication used in the base case.es
dc.format.mimetypeapplication/pdfes
dc.language.isoenges
dc.publisherSpringeres
dc.rights.accessRightsinfo:eu-repo/semantics/restrictedAccesses
dc.subjectComputación Heterogéneaes
dc.subjectComputación Paralelaes
dc.subjectAuto-Tuninges
dc.subject.classificationAutotuninges
dc.subject.classificationHybrid Programminges
dc.subject.classificationHeterogeneous Computinges
dc.titleIntegrating software and hardware hierarchies in an autotuning method for parallel routines in heterogeneous clusterses
dc.typeinfo:eu-repo/semantics/articlees
dc.rights.holderSpringer Science Business Mediaes
dc.identifier.doi10.1007/s11227-020-03235-9es
dc.relation.publisherversionhttps://link.springer.com/article/10.1007/s11227-020-03235-9es
dc.identifier.publicationfirstpage9922es
dc.identifier.publicationissue12es
dc.identifier.publicationlastpage9941es
dc.identifier.publicationtitleThe Journal of Supercomputinges
dc.identifier.publicationvolume76es
dc.peerreviewedSIes
dc.description.projectEste trabajo forma parte del proyecto de investigación RTI2018-098156-B-C53 financiado por la Agencia Estatal de Investigación (AEI) y el Ministerio de Ciencia, Innovación y Universidades (MCIU)es
dc.identifier.essn1573-0484es
dc.type.hasVersioninfo:eu-repo/semantics/publishedVersiones
dc.subject.unesco1203 Ciencia de Los Ordenadoreses
dc.subject.unesco3304 Tecnología de Los Ordenadoreses


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