dc.contributor.author | Cámara Moreno, Jesús | |
dc.contributor.author | Cuenca, Javier | |
dc.contributor.author | García, Luis Pedro | |
dc.contributor.author | Giménez, Domingo | |
dc.date.accessioned | 2025-01-27T19:03:10Z | |
dc.date.available | 2025-01-27T19:03:10Z | |
dc.date.issued | 2013 | |
dc.identifier.citation | Procedia Computer Science, 2013, Volume 18, Pages 110-119 | es |
dc.identifier.issn | 1877-0509 | es |
dc.identifier.uri | https://uvadoc.uva.es/handle/10324/74464 | |
dc.description | Producción Científica | es |
dc.description.abstract | In this work the behavior of the multithreaded implementation of some LAPACK routines on PLASMA and Intel MKL is analyzed. The main goal is to develop a methodology for the installation and modelling of shared-memory linear algebra routines so that some decisions to reduce the execution time can be taken at running time. Typical decisions are: the number of threads to use, the block or tile size in algorithms by blocks or tiles, and the routine to use when there are several algorithms or implementations to solve the problem available. Experiments carried out with PLASMA and Intel MKL show that decisions can be taken automatically and satisfactory execution times are obtained. | es |
dc.format.mimetype | application/pdf | es |
dc.language.iso | eng | es |
dc.publisher | Elsevier | es |
dc.rights.accessRights | info:eu-repo/semantics/openAccess | es |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/3.0/ | * |
dc.subject | Computación Paralela | es |
dc.subject.classification | Linear Algebra | es |
dc.subject.classification | Shared-memory | es |
dc.subject.classification | Performance Modelling | es |
dc.title | Empirical Modelling of Linear Algebra Shared-Memory Routines | es |
dc.type | info:eu-repo/semantics/article | es |
dc.rights.holder | © Autores | |
dc.identifier.doi | 10.1016/j.procs.2013.05.174 | es |
dc.relation.publisherversion | https://www.sciencedirect.com/science/article/pii/S1877050913003177 | es |
dc.identifier.publicationfirstpage | 110 | es |
dc.identifier.publicationlastpage | 119 | es |
dc.identifier.publicationtitle | Procedia Computer Science | es |
dc.identifier.publicationvolume | 18 | es |
dc.peerreviewed | SI | es |
dc.description.project | Este trabajo forma parte del proyecto de investigación 08763/PI/08 financiado por la Fundación Séneca y del proyecto de investigación TIN2012-38341-C04-03 financiado por el Ministerio de Economía (MINECO) | es |
dc.rights | Attribution-NonCommercial-NoDerivs 3.0 Unported | * |
dc.type.hasVersion | info:eu-repo/semantics/publishedVersion | es |
dc.subject.unesco | 1203 Ciencia de Los Ordenadores | es |
dc.subject.unesco | 3304 Tecnología de Los Ordenadores | es |