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| dc.contributor.author | Dueñas Carazo, Salvador | |
| dc.contributor.author | Castán Lanaspa, María Helena | |
| dc.contributor.author | González Ossorio, Óscar | |
| dc.contributor.author | Domínguez, L.A. | |
| dc.contributor.author | García García, Héctor | |
| dc.contributor.author | Kalam, K. | |
| dc.contributor.author | Ritala, M. | |
| dc.contributor.author | Leskelä, M. | |
| dc.date.accessioned | 2024-02-08T11:27:59Z | |
| dc.date.available | 2024-02-08T11:27:59Z | |
| dc.date.issued | 2018 | |
| dc.identifier.citation | 2017 32nd Conference on Design of Circuits and Integrated Systems (DCIS), 2017, Barcelona, Spain, p. 1-4 | es |
| dc.identifier.isbn | 978-1-5386-5108-7 | es |
| dc.identifier.uri | https://uvadoc.uva.es/handle/10324/65996 | |
| dc.description | Producción Científica | es |
| dc.description.abstract | The resistive switching behavior of Ta 2 O 5 -ZrO 2 -based metal-insulator-metal devices was studied. Asymmetrical and repetitive current-voltage loops were observed. Excellent control of admittance parameters in the intermediate states between the high and low resistance ones was achieved, demonstrating suitability to analog and neuromorphic applications. Admittance memory cycles provide relevant information about the switching mechanism, in which the existence of two different metallic species in the dielectric seems to play an important role. | es |
| dc.format.extent | 4 p. | es |
| dc.format.mimetype | application/pdf | es |
| dc.language.iso | eng | es |
| dc.publisher | Institute of Electrical and Electronics Engineers | es |
| dc.rights.accessRights | info:eu-repo/semantics/openAccess | es |
| dc.subject.classification | Resistive memories | es |
| dc.subject.classification | Admittance memory cycles | es |
| dc.subject.classification | Ta2O5:ZrO2 ALD films | es |
| dc.title | Admittance memory cycles of Ta2O5-ZrO2-based RRAM devices | es |
| dc.type | info:eu-repo/semantics/conferenceObject | es |
| dc.identifier.doi | 10.1109/DCIS.2017.8311627 | es |
| dc.relation.publisherversion | https://ieeexplore.ieee.org/document/8311627/authors#authors | es |
| dc.title.event | 2017 32nd Conference on Design of Circuits and Integrated Systems (DCIS) | es |
| dc.description.project | This study has been supported by the Spanish TEC2014 under Grant No. 52152-C3-3-R, and by Finnish Centre of Excellence in Atomic Layer Deposition (Academy of Finland, 284623) and Estonian Academy of Science (SLTFYUPROF) | es |
| dc.type.hasVersion | info:eu-repo/semantics/publishedVersion | es |
