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Communicators: an abstraction to ease the use of hardware accelerators
HiPEAC 2016 Workshop on High-Level Parallel Programming for GPUs (HLPGPU)
Año del Documento
Universidad de Valladolid, Escuela de Ingeniería Informática
HiPEAC 2016 Workshop on High-Level Parallel Programming for GPUs (HLPGPU), Prague, Jan. 18-20 2016.
Nowadays the use of hardware accelerators, such as the Graphics Processing Units (GPUs) or XeonPhi coprocessors, is key to solve computationally costly problems that require High Performance Computing (HPC). However, programming solutions for an efficient deployment in this kind of devices is a very complex task that relies on the manual management of memory transfers and configuration parameters. The programmer has to carry out a deep study of the particular data needed to be computed in each moment at the different computing platforms considering architectural details. We introduce the communicator concept as an abstract entity that allows the programmer to easily manage the communications and kernel launching details on hardware accelerators or multi-core devices in a transparent way. Furthermore, this model also gives the possibility to the programmer of launching CPU kernels in the multi-core processors with the same abstraction and methodology used for the accelerators. In this way, the burden of coding two different codes for managing the different computational devices is alleviated. Additionally, this entity allows the programmer to simplify the proper selection of values for kernel-launching configuration parameters. This is done through a simple characterization process of the kernel code to be executed. A programming model involving the communicator entity is described in this article. Finally, we also present a prototype library that implements the communicator model, together with its application in several study cases. Its use has led to reductions in the development costs with significantly low overheads in the execution times when compared to manually programmed and optimized solutions using CUDA and OpenMP directly.
MICINN (Spain) and ERDF program of the European Union: HomProg-HetSys project (TIN2014-58876-P), CAPAP-H5 network (TIN2014-53522-REDT), and COST Program Action IC1305: Network for Sustainable Ultrascale Computing (NESUS).
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Except where otherwise noted, this item's license is described as Attribution 4.0 International