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dc.contributor.authorCastán Lanaspa, María Helena 
dc.contributor.authorDueñas Carazo, Salvador 
dc.contributor.authorGarcía García, Héctor 
dc.contributor.authorGonzález Ossorio, Óscar 
dc.contributor.authorDomínguez, Leidy Azucena
dc.contributor.authorSahelices Fernández, Benjamín 
dc.contributor.authorMiranda, E.
dc.contributor.authorBargalló González, Mireia
dc.contributor.authorCampabadal Segura, Francesca
dc.date.accessioned2021-01-08T10:09:50Z
dc.date.available2021-01-08T10:09:50Z
dc.date.issued2018
dc.identifier.citationJournal of Applied Physics, 2018, vol. 124, n. 15. 9 p.es
dc.identifier.issn1089-7550es
dc.identifier.urihttp://uvadoc.uva.es/handle/10324/44651
dc.descriptionProducción Científicaes
dc.description.abstractA thorough study of the admittance of TiN/Ti/HfO2/W bipolar resistive memories [resistance random access memory (RRAM)] was carried out under different bias conditions and in a wide range of ac signal frequencies. We demonstrate that a continuum of intermediate states can be obtained by applying appropriate dc bias waveforms. Cumulative writing and erasing admittance cycles were performed by applying triangular voltage waveform of increasing amplitude. The influence of the initial conditions on the variation of the real (conductance) and imaginary (susceptance) components of the admittance is described. An accurate control of the memory state is achieved both in terms of the conductance and the susceptance by means of an adequate selection of the voltage values previously applied. A method to obtain three-dimensional voltage-conductance-susceptance state-plots is described in detail. Memory maps of admittance parameters as a function of the programming voltage are made by sensing the memory state at 0 V, without static power consumption. The multilevel nature of RRAM devices and their suitability for neuromorphic computation are demonstrated.es
dc.format.mimetypeapplication/pdfes
dc.language.isoenges
dc.publisherAIP Publishinges
dc.rights.accessRightsinfo:eu-repo/semantics/openAccesses
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/*
dc.subject.classificationMetal oxideses
dc.subject.classificationÓxidos metálicoses
dc.subject.classificationDielectric propertieses
dc.subject.classificationPropiedades dieléctricases
dc.subject.classificationThin filmses
dc.subject.classificationLáminas delgadases
dc.titleAnalysis and control of the intermediate memory states of RRAM devices by means of admittance parameterses
dc.typeinfo:eu-repo/semantics/articlees
dc.rights.holder© 2018 AIP Publishinges
dc.identifier.doi10.1063/1.5024836es
dc.relation.publisherversionhttps://aip.scitation.org/doi/10.1063/1.5024836es
dc.peerreviewedSIes
dc.description.projectMinisterio de Economía, Industria y Competitividad - Fondo Europeo de Desarrollo Regional (grants TEC2014-52152-C3-3-R and TEC2014- 52152-C3-1-R)es
dc.rightsAttribution-NonCommercial-NoDerivatives 4.0 Internacional*
dc.type.hasVersioninfo:eu-repo/semantics/publishedVersiones


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